IC ARM7 MCU FLASH 32K 64LQFP

LPC2141FBD64,151

Manufacturer Part NumberLPC2141FBD64,151
DescriptionIC ARM7 MCU FLASH 32K 64LQFP
ManufacturerNXP Semiconductors
SeriesLPC2100
LPC2141FBD64,151 datasheet
 

Specifications of LPC2141FBD64,151

Program Memory TypeFLASHProgram Memory Size32KB (32K x 8)
Package / Case64-LQFPCore ProcessorARM7
Core Size16/32-BitSpeed60MHz
ConnectivityI²C, Microwire, SPI, SSI, SSP, UART/USART, USBPeripheralsBrown-out Detect/Reset, POR, PWM, WDT
Number Of I /o45Ram Size8K x 8
Voltage - Supply (vcc/vdd)3 V ~ 3.6 VData ConvertersA/D 6x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Processor SeriesLPC21CoreARM7TDMI-S
Data Bus Width16 bit, 32 bitData Ram Size8 KB
Interface TypeSCI/UART/SPI/SSP/I2C/USBMaximum Clock Frequency60 MHz
Number Of Programmable I/os45Number Of Timers2
Operating Supply Voltage3.3 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsMDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature- 40 COn-chip Adc6-ch x 10-bit
Cpu FamilyLPC2000Device CoreARM7TDMI-S
Device Core Size16/32BitFrequency (max)60MHz
Total Internal Ram Size8KB# I/os (max)45
Number Of Timers - General Purpose2Operating Supply Voltage (typ)3.3V
Operating Supply Voltage (max)3.6VOperating Supply Voltage (min)3V
Instruction Set ArchitectureRISCOperating Temp Range-40C to 85C
Operating Temperature ClassificationIndustrialMountingSurface Mount
Pin Count64Package TypeLQFP
Package64LQFPFamily NameLPC2000
Maximum Speed60 MHzLead Free Status / RoHS StatusLead free / RoHS Compliant
For Use With568-4310 - EVAL BOARD LPC2158 W/LCD568-4297 - BOARD EVAL LPC21XX MCB2100MCB2140UME - BOARD EVAL MCB2140 + ULINK-MEMCB2140U - BOARD EVAL MCB2140 + ULINK2MCB2140 - BOARD EVAL NXP LPC214X ARM FAM622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-2097 - BOARD EVAL FOR LPC214X ARM MCUEeprom Size-
Other names568-1761
935280015151
LPC2141FBD64-S
  
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LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers; up to 512 kB flash
with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
Rev. 04 — 17 November 2008
1. General description
The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S
CPU with real-time emulation and embedded trace support, that combine the
microcontroller with embedded high-speed flash memory ranging from 32 kB to 512 kB. A
128-bit wide memory interface and a unique accelerator architecture enable 32-bit code
execution at the maximum clock rate. For critical code size applications, the alternative
16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty.
Due to their tiny size and low power consumption, LPC2141/42/44/46/48 are ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale. Serial communications interfaces ranging from a USB 2.0 Full-speed device,
multiple UARTs, SPI, SSP to I
devices very well suited for communication gateways and protocol converters, soft
modems, voice recognition and low end imaging, providing both large buffer size and high
processing power. Various 32-bit timers, single or dual 10-bit ADC(s), 10-bit DAC, PWM
channels and 45 fast GPIO lines with up to nine edge or level sensitive external interrupt
pins make these microcontrollers suitable for industrial control and medical systems.
2. Features
2.1 Key features
I
16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
I
8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash memory.
128-bit wide interface/accelerator enables high-speed 60 MHz operation.
I
In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot
loader software. Single flash sector or full chip erase in 400 ms and programming of
256 B in 1 ms.
I
EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the
on-chip RealMonitor software and high-speed tracing of instruction execution.
I
USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM.
In addition, the LPC2146/48 provides 8 kB of on-chip RAM accessible to USB by DMA.
I
One or two (LPC2141/42 vs. LPC2144/46/48) 10-bit ADCs provide a total of 6/14
analog inputs, with conversion times as low as 2.44 s per channel.
I
Single 10-bit DAC provides variable analog output (LPC2142/44/46/48 only).
I
Two 32-bit timers/external event counters (with four capture and four compare
channels each), PWM unit (six outputs) and watchdog.
2
C-bus and on-chip SRAM of 8 kB up to 40 kB, make these
Product data sheet

LPC2141FBD64,151 Summary of contents

  • Page 1

    LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC Rev. 04 — 17 November 2008 1. General description The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time ...

  • Page 2

    ... NXP Semiconductors I Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input. I Multiple serial interfaces including two UARTs (16C550), two Fast I SPI and SSP with buffering and variable data length capabilities. I Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses. ...

  • Page 3

    ... NXP Semiconductors 4. Block diagram LPC2141/42/44/46/48 P0[31:28] and FAST GENERAL P0[25:0] PURPOSE I/O P1[31:16] ARM7 local bus INTERNAL SRAM CONTROLLER 8 kB/16 kB SRAM EXTERNAL EINT3 to EINT0 INTERRUPTS 4 CAP0 CAPTURE/COMPARE 4 CAP1 (W/EXTERNAL CLOCK) 8 MAT0 TIMER 0/TIMER 1 8 MAT1 AD0[7:6] and AD0[4:1] A/D CONVERTERS 0 AND 1 ...

  • Page 4

    ... NXP Semiconductors 5. Pinning information 5.1 Pinning P0.21/PWM5/CAP1.3 1 P0.22/CAP0.0/MAT0 RTCX1 4 P1.19/TRACEPKT3 RTCX2 DDA P1.18/TRACEPKT2 8 P0.25/AD0 P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0 P0.29/AD0.2/CAP0.3/MAT0.3 P0.30/AD0.3/EINT3/CAP0.0 15 P1.16/TRACEPKT0 16 Fig 2. LPC2141 pinning LPC2141_42_44_46_48_4 Product data sheet LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers LPC2141 Rev. 04 — 17 November 2008 48 P1.20/TRACESYNC 47 P0.17/CAP1.2/SCK1/MAT1.2 46 P0.16/EINT0/MAT0.2/CAP0.2 45 P0.15/EINT2 44 P1.21/PIPESTAT0 P0.14/EINT1/SDA1 40 P1 ...

  • Page 5

    ... NXP Semiconductors P0.21/PWM5/CAP1.3 1 P0.22/CAP0.0/MAT0 RTCX1 P1.19/TRACEPKT3 4 RTCX2 DDA P1.18/TRACEPKT2 8 P0.25/AD0.4/AOUT P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0 P0.29/AD0.2/CAP0.3/MAT0.3 P0.30/AD0.3/EINT3/CAP0.0 15 P1.16/TRACEPKT0 16 Fig 3. LPC2142 pinning LPC2141_42_44_46_48_4 Product data sheet LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers LPC2142 Rev. 04 — 17 November 2008 48 P1.20/TRACESYNC 47 P0.17/CAP1.2/SCK1/MAT1.2 46 P0.16/EINT0/MAT0.2/CAP0.2 45 P0.15/EINT2 44 P1.21/PIPESTAT0 P0.14/EINT1/SDA1 40 P1.22/PIPESTAT1 39 P0.13/MAT1.1 38 P0.12/MAT1.0 37 P0.11/CAP1.1/SCL1 36 P1 ...

  • Page 6

    ... NXP Semiconductors P0.21/PWM5/AD1.6/CAP1 P0.22/AD1.7/CAP0.0/MAT0.0 RTCX1 3 P1.19/TRACEPKT3 4 RTCX2 DDA P1.18/TRACEPKT2 8 9 P0.25/AD0.4/AOUT P1.17/TRACEPKT1 12 13 P0.28/AD0.1/CAP0.2/MAT0.2 P0.29/AD0.2/CAP0.3/MAT0.3 14 P0.30/AD0.3/EINT3/CAP0 P1.16/TRACEPKT0 Fig 4. LPC2144/46/48 pinning LPC2141_42_44_46_48_4 Product data sheet LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers LPC2144/2146/2148 Rev. 04 — 17 November 2008 48 P1.20/TRACESYNC 47 P0.17/CAP1.2/SCK1/MAT1.2 46 P0.16/EINT0/MAT0.2/CAP0.2 45 P0.15/RI1/EINT2/AD1.5 44 P1.21/PIPESTAT0 P0.14/DCD1/EINT1/SDA1 40 P1.22/PIPESTAT1 39 P0.13/DTR1/MAT1.1/AD1 ...

  • Page 7

    ... NXP Semiconductors 5.2 Pin description Table 3. Pin description Symbol Pin P0.0 to P0.31 [1] P0.0/TXD0/ 19 PWM1 [2] P0.1/RXD0/ 21 PWM3/EINT0 [3] P0.2/SCL0/ 22 CAP0.0 [3] P0.3/SDA0/ 26 MAT0.0/EINT1 [4] P0.4/SCK0/ 27 CAP0.1/AD0.6 [4] P0.5/MISO0/ 29 MAT0.1/AD0.7 [4] P0.6/MOSI0/ 30 CAP0.2/AD1.0 [2] P0.7/SSEL0/ 31 PWM2/EINT2 [4] P0.8/TXD1/ 33 PWM4/AD1.1 LPC2141_42_44_46_48_4 Product data sheet Type Description I/O Port 0: Port 32-bit I/O port with individual direction controls for each bit. ...

  • Page 8

    ... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [2] P0.9/RXD1/ 34 PWM6/EINT3 [4] P0.10/RTS1/ 35 CAP1.0/AD1.2 [3] P0.11/CTS1/ 37 CAP1.1/SCL1 [4] P0.12/DSR1/ 38 MAT1.0/AD1.3 [4] P0.13/DTR1/ 39 MAT1.1/AD1.4 [3] P0.14/DCD1/ 41 EINT1/SDA1 [4] P0.15/RI1/ 45 EINT2/AD1.5 [2] P0.16/EINT0/ 46 MAT0.2/CAP0.2 [1] P0.17/CAP1.2/ 47 SCK1/MAT1.2 LPC2141_42_44_46_48_4 Product data sheet Type Description I/O P0.9 — General purpose input/output digital pin (GPIO). ...

  • Page 9

    ... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P0.18/CAP1.3/ 53 MISO1/MAT1.3 [1] P0.19/MAT1.2/ 54 MOSI1/CAP1.2 [2] P0.20/MAT1.3/ 55 SSEL1/EINT3 [4] P0.21/PWM5/ 1 AD1.6/CAP1.3 [4] P0.22/AD1.7/ 2 CAP0.0/MAT0.0 [1] P0.23/V 58 BUS [5] P0.25/AD0.4/ 9 AOUT [4] P0.28/AD0.1/ 13 CAP0.2/MAT0.2 [4] P0.29/AD0.2/ 14 CAP0.3/MAT0.3 [4] P0.30/AD0.3/ 15 EINT3/CAP0.0 LPC2141_42_44_46_48_4 Product data sheet Type Description I/O P0.18 — General purpose input/output digital pin (GPIO). ...

  • Page 10

    ... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [6] P0.31/UP_LED/ 17 CONNECT P1.0 to P1.31 [6] P1.16/ 16 TRACEPKT0 [6] P1.17/ 12 TRACEPKT1 [6] P1.18/ 8 TRACEPKT2 [6] P1.19/ 4 TRACEPKT3 [6] P1.20/ 48 TRACESYNC [6] P1.21/ 44 PIPESTAT0 [6] P1.22/ 40 PIPESTAT1 [6] P1.23/ 36 PIPESTAT2 [6] P1.24/ 32 TRACECLK [6] P1.25/EXTIN0 28 LPC2141_42_44_46_48_4 Product data sheet Type Description O P0.31 — General purpose output only digital pin (GPO). ...

  • Page 11

    ... NXP Semiconductors Table 3. Pin description …continued Symbol Pin [6] P1.26/RTCK 24 [6] P1.27/TDO 64 [6] P1.28/TDI 60 [6] P1.29/TCK 56 [6] P1.30/TMS 52 [6] P1.31/TRST [8] RESET 57 [9] XTAL1 62 [9] XTAL2 61 [9] RTCX1 3 [9] RTCX2 18, 25, 42 SSA V 23, 43 DDA VREF 63 VBAT 49 [ tolerant pad (no built-in pull-up resistor) providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. ...

  • Page 12

    ... NXP Semiconductors [ tolerant pad (no built-in pull-up resistor) providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When confi ...

  • Page 13

    ... NXP Semiconductors 6. Functional description 6.1 Architectural overview The ARM7TDMI general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of microprogrammed Complex Instruction Set Computers (CISC) ...

  • Page 14

    ... NXP Semiconductors 6.3 On-chip static RAM On-chip static RAM may be used for code and/or data storage. The SRAM may be accessed as 8-bit, 16-bit, and 32-bit. The LPC2141, LPC2142/44 and LPC2146/48 provide 8 kB and static RAM respectively. In case of LPC2146/48 only SRAM block intended to be utilized mainly by the USB can also be used as a general purpose RAM for data storage and code storage and execution ...

  • Page 15

    ... NXP Semiconductors 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted ...

  • Page 16

    ... NXP Semiconductors 6.7 Fast general purpose parallel I/O (GPIO) Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate registers allow setting or clearing any number of outputs simultaneously. The value of the output register may be read back, as well as the current state of the port pins ...

  • Page 17

    ... NXP Semiconductors • Selectable speed versus power. 6.10 USB 2.0 device controller The USB is a 4-wire serial bus that supports communication between a host and a number (127 max) of peripherals. The host controller allocates the USB bandwidth to attached devices through a token based protocol. The bus supports hot plugging, unplugging, and dynamic confi ...

  • Page 18

    ... NXP Semiconductors 6.11.1 Features • Receive and Transmit FIFOs. • Register locations conform to 16C550 industry standard. • Receiver FIFO trigger points and 14 B • Built-in fractional baud rate generator covering wide range of baud rates without a need for external crystals of particular values. ...

  • Page 19

    ... NXP Semiconductors 6.13.1 Features • Compliant with SPI specification. • Synchronous, Serial, Full Duplex, Communication. • Combined SPI master and slave. • Maximum data bit rate of one eighth of the input clock rate. 6.14 SSP serial I/O controller The LPC2141/42/44/46/48 each contain one Serial Synchronous Port controller (SSP). ...

  • Page 20

    ... NXP Semiconductors – Stop timer on match with optional interrupt generation. – Reset timer on match with optional interrupt generation. • Four external outputs per timer/counter corresponding to match registers, with the following capabilities: – Set LOW on match. – Set HIGH on match. – Toggle on match. ...

  • Page 21

    ... NXP Semiconductors 6.18 Pulse width modulator The PWM is based on the standard timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2141/42/44/46/48. The timer is designed to count cycles of the peripheral clock (PCLK) and optionally generate interrupts or perform other actions when specified timer values occur, based on seven match registers. ...

  • Page 22

    ... NXP Semiconductors • Match register updates are synchronized with pulse outputs to prevent generation of erroneous pulses. Software must ‘release’ new match values before they can become effective. • May be used as a standard timer if the PWM mode is not enabled. • A 32-bit Timer/Counter with a programmable 32-bit Prescaler. ...

  • Page 23

    ... NXP Semiconductors The Wake-up Timer monitors the crystal oscillator as the means of checking whether it is safe to begin code execution. When power is applied to the chip, or some event caused the chip to exit Power-down mode, some time is required for the oscillator to produce a signal of sufficient amplitude to drive the clock logic. The amount of time depends on ...

  • Page 24

    ... NXP Semiconductors 6.19.8 Power control The LPC2141/42/44/46/48 supports two reduced power modes: Idle mode and Power-down mode. In Idle mode, execution of instructions is suspended until either a reset or interrupt occurs. Peripheral functions continue operation during Idle mode and may generate interrupts to cause the processor to resume execution. Idle mode eliminates power used by the processor itself, memory systems and related controllers, and internal buses ...

  • Page 25

    ... NXP Semiconductors The ARM core has a Debug Communication Channel (DCC) function built-in. The DCC allows a program running on the target to communicate with the host debugger or another separate host without stopping the program flow or even entering the debug state. The DCC is accessed as a co-processor 14 by the program running on the ARM7TDMI-S core. The DCC allows the JTAG port to be used for sending and receiving data without affecting the normal program fl ...

  • Page 26

    ... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (core and external rail analog 3.3 V pad supply voltage DDA V input voltage on pin VBAT i(VBAT) V input voltage on pin VREF i(VREF) V analog input voltage ...

  • Page 27

    ... NXP Semiconductors 8. Static characteristics Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage DD V analog supply voltage DDA V input voltage on pin i(VBAT) VBAT V input voltage on pin i(VREF) VREF Standard port pins, RESET, RTCK I LOW-level input current ...

  • Page 28

    ... NXP Semiconductors Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter I active mode supply DD(act) current I Power-down mode DD(pd) supply current I Power-down mode BATpd battery supply current I active mode battery BATact supply current I optimized active mode ...

  • Page 29

    ... NXP Semiconductors Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V output voltage on pin o(XTAL2) XTAL2 V input voltage on pin i(RTCX1) RTCX1 V output voltage on pin o(RTCX2) RTCX2 USB pins I OFF-state output OZ current V V line input voltage BUS ...

  • Page 30

    ... NXP Semiconductors Table 6. ADC static characteristics +85 C unless otherwise specified; ADC frequency 4.5 MHz. DDA amb Symbol Parameter V analog input voltage IA C analog input capacitance ia E differential linearity error D E integral non-linearity L(adj) E offset error O E gain error G E absolute error ...

  • Page 31

    ... NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (E (4) Integral non-linearity (E L(adj) (5) Center of a step of the actual transfer curve. Fig 6. ADC characteristics LPC2141_42_44_46_48_4 Product data sheet ...

  • Page 32

    ... NXP Semiconductors ADx.y Fig 7. Suggested ADC interface - LPC2141/42/44/46/48 ADx.y pin LPC2141_42_44_46_48_4 Product data sheet LPC2141/42/44/46/ SAMPLE Rev. 04 — 17 November 2008 LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers R vsi ADx.y V EXT 002aab834 © NXP B.V. 2008. All rights reserved ...

  • Page 33

    ... NXP Semiconductors 9. Dynamic characteristics Table 7. Dynamic characteristics of USB pins (full-speed pF 1 Symbol Parameter t rise time r t fall time f t differential rise and fall time FRFM matching V output signal crossover voltage CRS t source SE0 interval of EOP FEOPT t source jitter for differential transition ...

  • Page 34

    ... NXP Semiconductors 9.1 Timing Fig 8. External clock timing (with an amplitude of at least V t PERIOD differential data lines Fig 9. Differential data-to-EOP transition skew and EOP width 10. Application information 10.1 Suggested USB interface solutions LPC2141/42/ 44/46/48 Fig 10. LPC2141/42/44/46/48 USB interface using the CONNECT function on pin 17 ...

  • Page 35

    ... NXP Semiconductors LPC2141/42/ 44/46/48 Fig 11. LPC2141/42/44/46/48 USB interface using the UP_LED function on pin 17 LPC2141_42_44_46_48_4 Product data sheet LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers 1.5 k UP_LED VBUS Rev. 04 — 17 November 2008 USB-B connector 002aab562 © NXP B.V. 2008. All rights reserved ...

  • Page 36

    ... NXP Semiconductors 11. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.20 1.45 mm 1.6 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION ...

  • Page 37

    ... NXP Semiconductors 12. Abbreviations Table 9. Acronym ADC APB BOD CPU DAC DCC DMA EOP FIFO GPIO PLL POR PWM RAM SE0 SPI SRAM SSP UART USB LPC2141_42_44_46_48_4 Product data sheet Acronym list Description Analog-to-Digital Converter Advanced Peripheral Bus Brown-Out Detection Central Processing Unit ...

  • Page 38

    ... NXP Semiconductors 13. Revision history Table 10. Revision history Document ID Release date LPC2141_42_44_46_48_4 20081117 Modifications: LPC2141_42_44_46_48_3 20071019 LPC2141_42_44_46_48_2 20060828 LPC2141_42_44_46_48_1 20051003 LPC2141_42_44_46_48_4 Product data sheet Data sheet status Product data sheet • Replaced all occurrences of VPB with APB. • Table 3: clarified which pins do/don’t have internal pull-ups. ...

  • Page 39

    ... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

  • Page 40

    ... NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.1 Key features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Functional description . . . . . . . . . . . . . . . . . . 13 6.1 Architectural overview 6.2 On-chip flash program memory . . . . . . . . . . . 13 6.3 On-chip static RAM ...