P87C591VFA/00,512 NXP Semiconductors, P87C591VFA/00,512 Datasheet - Page 27

IC 80C51 MCU 16K OTP 44-PLCC

P87C591VFA/00,512

Manufacturer Part Number
P87C591VFA/00,512
Description
IC 80C51 MCU 16K OTP 44-PLCC
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet

Specifications of P87C591VFA/00,512

Core Processor
8051
Core Size
8-Bit
Speed
12MHz
Connectivity
CAN, EBI/EMI, I²C, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
CAN, I2C, UART
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-1256-5
935268182512
P87C591VFAA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87C591VFA/00,512
Manufacturer:
TI
Quantity:
8
Part Number:
P87C591VFA/00,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
12.3
A 80C51 CPU Interface connects the PeliCAN to the
internal bus of an 80C51 microcontroller. Special Function
Registers, allows a smart and fast access to the PeliCAN
registers and RAM area. Because of the big address range
to be supported, an indirect pointer based addressing is
12.3.1
Via the five Special Function Registers CANADR,
CANDAT, CANMOD, CANSTA and CANCON the CPU
has access to the PeliCAN Block. Note that CANCON and
CANSTA have different registers mapped depending on
the direction of the access.
2000 Jul 26
handbook, full pagewidth
Single-chip 8-bit microcontroller with CAN controller
Communication between PeliCAN controller
and CPU
S
PECIAL
F
UNCTION
80C51
CORE
R
EGISTERS
write
read
address
data
Fig.11 CPU to CAN Interfacing.
INTERFACE
CANMOD
CANCON
CANADR
CANDAT
CANSTA
SFRs
27
included allowing a fast register access with address
autoincrement mode. This reduces the needed number of
Special Function Registers to an amount of 5.
The PeliCAN registers may be accessed in two different
ways. The most important registers, which should support
software polling or are controlling major CAN functions are
accessible directly as separate SFRs. Other parts of the
PeliCAN Block are accessible using an indirect pointer
mechanism. In order to achieve a high data throughput
even if the indirect access is used, an address
auto-increment feature is included here.
Five Special Function Registers (SFRs)
Register address generation in auto-increment mode
Access to the complete address range of the PeliCAN
CAN CONTROLLER
PeliCAN
MHI020
Preliminary Specification
P8xC591

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