LPC2292FET144/01,5 NXP Semiconductors, LPC2292FET144/01,5 Datasheet - Page 10

• Manufacturer Part Number: LPC2292FET144/01,5
• Description: IC ARM7 MCU FLASH 256K 144TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2200r

Specifications of LPC2292FET144/01,5

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-TFBGA
• Processor Series: LPC22
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, I2C, JTAG, SPI, SSP, UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 112
• Number Of Timers: 2
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 144TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 60 MHz
• For Use With: OM10091 - KIT DEV PHYCORE-ARM7/LPC2220622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-1757 - BOARD EVAL FOR LPC220X ARM MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4320; 935284897551; LPC2292FET144/01-S; LPC2292FET144/01-S

NXP Semiconductors
Table 4.
LPC2292_2294_7
Product data sheet
Symbol
P0[27]/AIN0/
CAP0[1]/
MAT0[1]
P0[28]/AIN1/
CAP0[2]/
MAT0[2]
P0[29]/AIN2/
CAP0[3]/
MAT0[3]
P0[30]/AIN3/
EINT3/CAP0[0]
P1[0] to P1[31]
P1[0]/CS0
P1[1]/OE
P1[16]/
TRACEPKT0
P1[17]/
TRACEPKT1
P1[18]/
TRACEPKT2
P1[19]/
TRACEPKT3
P1[20]/
TRACESYNC
P1[21]/
PIPESTAT0
P1[22]/
PIPESTAT1
P1[23]/
PIPESTAT2
P1[24]/
TRACECLK
Pin description
Pin (LQFP)
23
25
32
33
91
90
34
24
15
7
102
95
86
82
70
[7]
[6]
[6]
[6]
[6]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
…continued
Pin
(TFBGA)
H3
J1
L1
L2
G11
G13
L3
H4
F2
D2
D12
F11
H11
J11
L11
[6]
[6]
[6]
[7]
[7]
[6]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[1]
Type
I
I
O
I
I
O
I
I
O
I
I
I
I/O
O
O
O
O
O
O
O
O
O
O
O
Rev. 7 — 4 December 2008
16/32-bit ARM microcontrollers with external memory interface
Description
AIN0 — ADC, input 0. This analog input is always connected
to its pin.
CAP0[1] — Capture input for Timer 0, channel 1.
MAT0[1] — Match output for Timer 0, channel 1.
AIN1 — ADC, input 1. This analog input is always connected
to its pin.
CAP0[2] — Capture input for Timer 0, channel 2.
MAT0[2] — Match output for Timer 0, channel 2.
AIN2 — ADC, input 2. This analog input is always connected
to its pin.
CAP0[3] — Capture input for Timer 0, Channel 3.
MAT0[3] — Match output for Timer 0, channel 3.
AIN3 — ADC, input 3. This analog input is always connected
to its pin.
EINT3 — External interrupt 3 input.
CAP0[0] — Capture input for Timer 0, channel 0.
Port 1: Port 1 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 1 pins
depends upon the pin function selected via the Pin Connect
Block.
Pins 2 through 15 of port 1 are not available.
CS0 — LOW-active Chip Select 0 signal.
OE — LOW-active Output Enable signal.
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with
internal pull-up.
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with
internal pull-up.
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with
internal pull-up.
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with
internal pull-up.
TRACESYNC — Trace Synchronization. Standard I/O port
with internal pull-up.
Note: LOW on this pin while RESET is LOW, enables pins
P1[25:16] to operate as Trace port after reset.
PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with
internal pull-up.
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with
internal pull-up.
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with
internal pull-up.
TRACECLK — Trace Clock. Standard I/O port with internal
pull-up.
(Bank 0 addresses range 0x8000 0000 to 0x80FF FFFF)
LPC2292/LPC2294
© NXP B.V. 2008. All rights reserved.
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