Z16F2810AG20SG Zilog, Z16F2810AG20SG Datasheet - Page 90

• Manufacturer Part Number: Z16F2810AG20SG
• Description: IC ZNEO MCU FLASH 128K 64LQFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2810AG20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• Processor Series: Z16F2x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4535

Table 28. Port A-K High Drive Enable Registers (PxHDE)
Table 29. Port A-K Alternate Function High Registers (PxAFH)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Caution:
Port A-K High Drive Enable Registers
Port A-K Alternate Function High and Low Registers
FF_E103, FF_E113, FF_E123, FF_E133, FF_E143, FF_E153, FF_E163, FF_E173, FF_E183,
PHDE7
AFH[7]
R/W
R/W
7
0
7
0
Setting the bits in the Port A-K high drive enable registers (see
the specified port pins for high current output drive operation. The Port A-K high drive
enable registers affect the pins directly, and as a result, alternate functions are also affected.
PHDE[7:0]—Port High Drive Enabled
0 = The port pin is configured for standard output current drive. 
1 = The port pin is configured for high output current drive.
The Port A-K alternate function high and low registers (see
page 75) select the alternate functions for the selected pins. To determine the alternate
function associated with each port pin, see
changing alternate functions, it is recommended to use word data mode instructions to
perform simultaneous Writes to the port alternate function high and low registers.
Do not enable alternate function for GPIO port pins which do not have an
associated alternate function. Failure to follow this guideline will result in
undefined operation.
PHDE6
AFH[6]
R/W
R/W
6
0
6
0
PHDE5
AFH[5]
FF_E104, FF_E124, FF_E134, FF_E174
R/W
R/W
5
5
0
0
P R E L I M I N A R Y
PHDE4
AFH[4]
R/W
R/W
4
0
4
0
FF_E193
GPIO Alternate Functions
PHDE3
AFH[3]
R/W
R/W
3
3
0
0
PHDE2
AFH[2]
R/W
R/W
Table 29
2
0
2
0
General-Purpose Input/Output
Table
Product Specification
ZNEO
and
28) to 1, configures
PHDE1
AFH[1]
on page 69. When
R/W
R/W
1
1
0
0
Table 30


Z16F Series
PHDE0
AFH[0]
on
R/W
R/W
0
0
0
0
75