MCHC908QY1CDWE Freescale Semiconductor, MCHC908QY1CDWE Datasheet - Page 31

• Manufacturer Part Number: MCHC908QY1CDWE
• Description: IC MCU 1.5K FLASH 16-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908QY1CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Processor Series: HC08QY
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
$FE0C
$FE0D
$FFBE
$FE08
$FE09
$FE0A
$FE0B
$FE0F
$FFBF
$FFC0
$FFC1
$FFFF
Addr.
↓
Reserved for FLASH Test
Break Status and Control
FLASH Control Register
Internal Oscillator Trim
Internal Oscillator Trim
(Factory Programmed,
(Factory Programmed,
COP Control Register
Register Name
FLASH Block Protect
Break Address High
Register (BRKSCR)
LVI Status Register
Break Address low
Register (FLBPR)
Register (BRKH)
Register (BRKL)
See page 136.
See page 136.
See page 136.
See page 34.
See page 87.
See page 39.
VDD = 5.0 V)
VDD = 3.0 V)
See page 59.
(COPCTL)
Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 5)
(LVISR)
(FLCR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
MC68HC908QY/QT Family Data Sheet, Rev. 6
LVIOUT
TRIM7
TRIM7
BRKE
BPR7
Bit 15
Bit 7
Bit 7
R
R
0
0
0
0
0
0
= Unimplemented
TRIM6
TRIM6
BRKA
Bit 14
BPR6
Bit 6
R
R
6
0
0
0
0
0
0
0
WRITING CLEARS COP COUNTER (ANY VALUE)
TRIM5
TRIM5
Bit 13
BPR5
Bit 5
R
R
5
0
0
0
0
0
0
0
0
LOW BYTE OF RESET VECTOR
TRIM4
TRIM4
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
Bit 12
BPR4
Bit 4
R
R
R
4
0
0
0
0
0
0
0
0
= Reserved
TRIM3
TRIM3
HVEN
BPR3
Bit 11
Bit 3
R
R
3
0
0
0
0
0
0
0
TRIM2
TRIM2
MASS
Bit 10
BPR2
U = Unaffected
Bit 2
R
R
Input/Output (I/O) Section
2
0
0
0
0
0
0
0
ERASE
TRIM1
TRIM1
BPR1
Bit 9
Bit 1
R
R
1
0
0
0
0
0
0
0
TRIM0
TRIM0
BPR0
PGM
Bit 0
Bit 8
Bit 0
R
R
R
0
0
0
0
0
0
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