MCHC908QY1CDWE Freescale Semiconductor, MCHC908QY1CDWE Datasheet - Page 85

IC MCU 1.5K FLASH 16-SOIC

MCHC908QY1CDWE

Manufacturer Part Number
MCHC908QY1CDWE
Description
IC MCU 1.5K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCHC908QY1CDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

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Chapter 10
Low-Voltage Inhibit (LVI)
10.1 Introduction
This section describes the low-voltage inhibit (LVI) module, which monitors the voltage on the V
and can force a reset when the V
10.2 Features
Features of the LVI module include:
10.3 Functional Description
Figure 10-1
user selectable options found in the configuration register (CONFIG1). See
Register
The LVI is enabled out of reset. The LVI module contains a bandgap reference circuit and comparator.
Clearing the LVI power disable bit, LVIPWRD, enables the LVI to monitor V
reset disable bit, LVIRSTD, enables the LVI module to generate a reset when V
Freescale Semiconductor
Programmable LVI reset
Programmable power consumption
Selectable LVI trip voltage
Programmable stop mode operation
(CONFIG).
shows the structure of the LVI module. LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are
FROM CONFIG
DETECTOR
LVI5OR3
LOW V
V
DD
DD
Figure 10-1. LVI Module Block Diagram
V
V
MC68HC908QY/QT Family Data Sheet, Rev. 6
DD
DD
DD
FROM CONFIG
> LVITRIP = 0
≤ LVITRIP = 1
voltage falls below the LVI trip falling voltage, V
LVIPWRD
LVIOUT
STOP INSTRUCTION
FROM CONFIG
LVIRSTD
FROM CONFIG
DD
Chapter 5 Configuration
LVI RESET
LVISTOP
voltage. Clearing the LVI
DD
falls below a voltage,
TRIPF
.
DD
pin
85

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