MC9S12C32CFUE16 Freescale Semiconductor, MC9S12C32CFUE16 Datasheet - Page 273

IC MCU 32K FLASH 16MHZ 80-QFP

MC9S12C32CFUE16

Manufacturer Part Number
MC9S12C32CFUE16
Description
IC MCU 32K FLASH 16MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32CFUE16

Core Processor
HCS12
Core Size
16-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
60
Number Of Timers
8
Operating Supply Voltage
- 0.3 V to + 6.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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If the PRE bit is set, the RTI will continue to run in pseudo-stop mode.
9.4.7
9.4.7.1
The CRGV4 block behaves as described within this specification in all normal modes.
9.4.7.2
The VCO has a minimum operating frequency, f
to a failure or due to long crystal start-up time, the bus clock and the core clock are derived from the VCO
running at minimum operating frequency; this mode of operation is called self-clock mode. This requires
CME = 1 and SCME = 1. If the MCU was clocked by the PLL clock prior to entering self-clock mode, the
PLLSEL bit will be cleared. If the external clock signal has stabilized again, the CRG will automatically
select OSCCLK to be the system clock and return to normal mode. See
Checker” for more information on entering and leaving self-clock mode.
Freescale Semiconductor
Modes of Operation
Normal Mode
Self-Clock Mode
gating condition
OSCCLK
= Clock Gate
STOP(PSTP,PRE),
WAIT(RTIWAI),
RTI enable
MC9S12C-Family / MC9S12GC-Family
Figure 9-22. Clock Chain for RTI
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
÷
SCM
Rev 01.24
1024
.
Chapter 9 Clocks and Reset Generator (CRGV4) Block Description
. If the external clock frequency is not available due
RTR[6:4]
0:1:0
0:0:1
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
COUNTER (RTR[3:0])
4-BIT MODULUS
Section 9.4.4, “Clock Quality
RTI TIMEOUT
273

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