MC9S12C32CFUE16 Freescale Semiconductor, MC9S12C32CFUE16 Datasheet - Page 51

• Manufacturer Part Number: MC9S12C32CFUE16
• Description: IC MCU 32K FLASH 16MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C32CFUE16

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1.3.4.6
PA7–PA0 are general purpose input or output pins,. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus. PA[7:1] pins are not available in the 48-pin package
version. PA[7:3] are not available in the 52-pin package version.
1.3.4.7
PB7–PB0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus. PB[7:5] and PB[3:0] pins are not available in the
48-pin nor 52-pin package version.
1.3.4.8
PE7 is a general purpose input or output pin. During MCU expanded modes of operation, the NOACC
signal, when enabled, is used to indicate that the current bus cycle is an unused or “free” cycle. This signal
will assert when the CPU is not using the bus.The XCLKS is an input signal which controls whether a
crystal in combination with the internal Colpitts (low power) oscillator is used or whether Pierce
oscillator/external clock circuitry is used. The state of this pin is latched at the rising edge of RESET. If
the input is a logic low the EXTAL pin is configured for an external clock drive or a Pierce oscillator. If
input is a logic high a Colpitts oscillator circuit is configured on EXTAL and XTAL. Since this pin is an
input with a pull-up device during reset, if the pin is left floating, the default configuration is a Colpitts
oscillator circuit on EXTAL and XTAL.
Freescale Semiconductor
PA[7:0] / ADDR[15:8] / DATA[15:8] — Port A I/O Pins
PB[7:0] / ADDR[7:0] / DATA[7:0] — Port B I/O Pins
PE7 / NOACC / XCLKS — Port E I/O Pin 7
MCU
1. Due to the nature of a translated ground Colpitts oscillator a DC voltage
Figure 1-11. Colpitts Oscillator Connections (PE7 = 1)
bias is applied to the crystal. Please contact the crystal manufacturer for
crystal DC.
1. RS can be zero (shorted) when used with higher frequency crystals,
MCU
Figure 1-12. Pierce Oscillator Connections (PE7 = 0)
EXTAL
XTAL
EXTAL
refer to manufacturer’s data.
XTAL
MC9S12C-Family / MC9S12GC-Family
CDC
R
S
1
1
R
B
Rev 01.24
Chapter 1 MC9S12C and MC9S12GC Device Overview (MC9S12C128)
C
1
C
2
Ceramic Resonator
V
SSPLL
Crystal or
C
C
Ceramic Resonator
1
2
Crystal or
V
SSPLL
51