MC9S12HZ128CAL Freescale Semiconductor, MC9S12HZ128CAL Datasheet - Page 617

IC MCU 16BIT 128K FLASH 112-LQFP

MC9S12HZ128CAL

Manufacturer Part Number
MC9S12HZ128CAL
Description
IC MCU 16BIT 128K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12HZ128CAL

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12HZ128CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
In emulation modes, if the EMK bit in the MODE register (see MEBI block description chapter) is set, the
data and data direction registers for port K are removed from the on-chip memory map and become
external accesses.
22.4.2.2
When the EMK bit in the MODE register (see MEBI block description chapter) is set, port K bit 7 is used
as an active-low emulation chip select signal, ECS. This signal is active when the system is in emulation
mode, the EMK bit is set and the FLASH or ROM space is being addressed subject to the conditions
outlined in
EMK bit is clear, this pin is used for general purpose I/O.
22.4.2.3
When the EMK bit in the MODE register (see MEBI block description chapter) is set, port K bit 6 is used
as an active-low external chip select signal, XCS. This signal is active only when the ECS signal described
above is not active and when the system is addressing the external address space. Accesses to
unimplemented locations within the register space or to locations that are removed from the map (i.e., ports
A and B in expanded modes) will not cause this signal to become active. When the EMK bit is clear, this
pin is used for general purpose I/O.
22.4.3
The HCS12 core architecture limits the physical address space available to 64K bytes. The program page
index register allows for integrating up to 1M byte of FLASH or ROM into the system by using the six
page index bits to page 16K byte blocks into the program page window located from 0x8000 to 0xBFFF
in the physical memory space. The paged memory space can consist of solely on-chip memory or a
combination of on-chip and off-chip memory. This partitioning is configured at system integration through
the use of the paging configuration switches (pag_sw1:pag_sw0) at the core boundary. The options
available to the integrator are as given in
for easy reference).
Based upon the system configuration, the program page window will consider its access to be either
internal or external as defined in
Freescale Semiconductor
Section 22.4.3.2, “Extended Address (XAB19:14) and ECS Signal
Memory Expansion
Emulation Chip Select Signal
External Chip Select Signal
pag_sw1:pag_sw0
00
01
10
11
Table 22-16. Allocated Off-Chip Memory Options
Table
MC9S12HZ256 Data Sheet, Rev. 2.05
22-17.
Table 22-16
Off-Chip Space
876K bytes
768K bytes
512K bytes
0K byte
(this table matches
Chapter 22 Module Mapping Control (MMCV4)
Table 22-12
On-Chip Space
128K bytes
256K bytes
512K bytes
1M byte
Functionality.” When the
but is repeated here
617

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