SAF-C164CI-8EM CB Infineon Technologies, SAF-C164CI-8EM CB Datasheet - Page 13

IC MCU 16BIT OTP MQFP-80-1

SAF-C164CI-8EM CB

Manufacturer Part Number
SAF-C164CI-8EM CB
Description
IC MCU 16BIT OTP MQFP-80-1
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C164CI-8EM CB

Core Processor
C166
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-SQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
ASC, CAN, SSC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
59
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-80
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
64.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
F164CI8EMCBNT
F164CI8EMCBXT
SAF-C164CI-8EMCB
SAF-C164CI-8EMCBINTR
SAF-C164CI-8EMCBTR
SAF-C164CI-8EMCBTR
SAFC164CI8EMCBXT
SP000103499
Table 2
Symbol Pin
XTAL2
XTAL1
RSTIN
RST
OUT
NMI
Data Sheet
No.
54
55
69
70
71
Pin Definitions and Functions (cont’d)
Input
Outp.
O
I
I/O
O
I
Function
XTAL2:
XTAL1:
To clock the device from an external source, drive XTAL1,
while leaving XTAL2 unconnected. Minimum and maximum
high/low and rise/fall times specified in the AC
Characteristics must be observed.
Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the C164CI.
An internal pullup resistor permits power-on reset using only
a capacitor connected to
A spike filter suppresses input pulses <10 ns. Input pulses
>100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit BDRSTEN
in register SYSCON) the RSTIN line is internally pulled low
for the duration of the internal reset sequence upon any reset
(HW, SW, WDT). See note below this table.
Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or
a watchdog timer reset. RSTOUT remains low until the EINIT
(end of initialization) instruction is executed.
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the C164CI to go into power
down mode. If NMI is high, when PWRDN is executed, the
part will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Output of the oscillator amplifier circuit.
Input to the oscillator amplifier and input to
the internal clock generator
9
V
SS
.
C164CL/SL
V2.0, 2001-05
C164CI/SI

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