SAF-C164CI-8EM CB Infineon Technologies, SAF-C164CI-8EM CB Datasheet - Page 69

IC MCU 16BIT OTP MQFP-80-1

SAF-C164CI-8EM CB

Manufacturer Part Number
SAF-C164CI-8EM CB
Description
IC MCU 16BIT OTP MQFP-80-1
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet

Specifications of SAF-C164CI-8EM CB

Core Processor
C166
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-SQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
ASC, CAN, SSC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
59
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-80
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
64.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
F164CI8EMCBNT
F164CI8EMCBXT
SAF-C164CI-8EMCB
SAF-C164CI-8EMCBINTR
SAF-C164CI-8EMCBTR
SAF-C164CI-8EMCBTR
SAFC164CI8EMCBXT
SP000103499
AC Characteristics
Demultiplexed Bus
(Operating Conditions apply)
ALE cycle time = 4 TCL + 2
Parameter
ALE high time
Address setup to ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
RD, WR low time
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay
Data float after RD rising
edge (no RW-delay
Data Sheet
(with RW-delay)
(no RW-delay)
(with RW-delay)
(no RW-delay)
1)
1)
)
)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
5
6
8
9
12
13
14
15
16
17
18
20
21
A
+
CC 10 +
CC 4 +
CC 10 +
CC -10 +
CC 30 +
CC 50 +
SR –
SR –
SR –
SR –
SR 0
SR –
SR –
t
C
+
t
min.
F
Max. CPU Clock
(80 ns at 25 MHz CPU clock without waitstates)
t
A
= 25 MHz
t
t
t
t
65
A
A
C
C
t
A
max.
20 +
40 +
40 +
t
50 +
2
26 +
2
10 +
2
A
t
t
t
A
A
A
+
+
+
+
t
t
t
C
t
t
t
C
C
F
F
C
1)
1)
1 / 2TCL = 1 to 25 MHz
min.
TCL - 10
+
TCL - 16
+
TCL - 10
+
-10
+
2TCL - 10
+
3TCL - 10
+
0
Variable CPU Clock
t
t
t
t
t
t
A
A
A
A
C
C
max.
2TCL - 20
+
3TCL - 20
+
3TCL - 20
+
4TCL - 30
+ 2
2TCL - 14
+ 22
+
TCL - 10
+ 22
+
t
t
t
t
t
C
C
A
F
F
t
1)
1)
A
C164CL/SL
+
t
t
V2.0, 2001-05
A
A
+
C164CI/SI
t
C
t
C
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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