SAF-C164CI-8EM CB Infineon Technologies, SAF-C164CI-8EM CB Datasheet - Page 16

• Manufacturer Part Number: SAF-C164CI-8EM CB
• Description: IC MCU 16BIT OTP MQFP-80-1
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C164CI-8EM CB

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: OTP
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-SQFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: ASC, CAN, SSC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 4.0 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 64.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F164CI8EMCBNT; F164CI8EMCBXT; SAF-C164CI-8EMCB; SAF-C164CI-8EMCBINTR; SAF-C164CI-8EMCBTR; SAF-C164CI-8EMCBTR; SAFC164CI8EMCBXT; SP000103499

C164CI/SI
C164CL/SL
Memory Organization
The memory space of the C164CI is configured in a Von Neumann architecture which
means that code memory, data memory, registers and I/O ports are organized within the
same linear address space which includes 16 MBytes. The entire memory space can be
accessed bytewise or wordwise. Particular portions of the on-chip memory have
additionally been made directly bitaddressable.
The C164CI incorporates 64 KBytes of on-chip OTP memory or 64/48 KBytes of on-chip
mask-programmable ROM (not in the ROM-less derivative, of course) for code or
constant data. The lower 32 KBytes of the on-chip ROM/OTP can be mapped either to
segment 0 or segment 1.
The OTP memory can be programmed by the CPU itself (in system, e.g. during booting)
or directly via an external interface (e.g. before assembly). The programming time is
approx. 100 µs per word. An external programming voltage
V
= 11.5 V must be
PP
V
supplied for this purpose (via pin EA/
).
PP
2 KBytes of on-chip Internal RAM (IRAM) are provided as a storage for user defined
variables, for the system stack, general purpose register banks and even for code. A
register bank can consist of up to 16 wordwide (R0 to R15) and/or bytewide (RL0, RH0,
…, RL7, RH7) so-called General Purpose Registers (GPRs).
1024 bytes (2 × 512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are wordwide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the C166 Family.
2 KBytes of on-chip Extension RAM (XRAM) are provided to store user data, user
stacks, or code. The XRAM is accessed like external memory and therefore cannot be
used for the system stack or for register banks and is not bitaddressable. The XRAM
permits 16-bit accesses with maximum speed.
In order to meet the needs of designs where more memory is required than is provided
on chip, up to 4 MBytes of external RAM and/or ROM can be connected to the
microcontroller.
Data Sheet
12
V2.0, 2001-05