MC68332GVEH25 Freescale Semiconductor, MC68332GVEH25 Datasheet - Page 235

• Manufacturer Part Number: MC68332GVEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GVEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 132-QFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PT — Parity Type
PE — Parity Enable
M — Mode Select
WAKE — Wakeup by Address Mark
TIE — Transmit Interrupt Enable
TCIE — Transmit Complete Interrupt Enable
RIE — Receiver Interrupt Enable
ILIE — Idle-Line Interrupt Enable
TE — Transmitter Enable
RE — Receiver Enable
RWU — Receiver Wakeup
SBK — Send Break
MC68332
USER’S MANUAL
0 = Even parity
1 = Odd parity
0 = SCI parity disabled
1 = SCI parity enabled
0 = 10-bit SCI frame
1 = 11-bit SCI frame
0 = SCI receiver awakened by idle-line detection
1 = SCI receiver awakened by address mark (last bit set)
0 = SCI TDRE interrupts inhibited
1 = SCI TDRE interrupts enabled
0 = SCI TC interrupts inhibited
1 = SCI TC interrupts enabled
0 = SCI RDRF and OR interrupts inhibited
1 = SCI RDRF and OR interrupts enabled
0 = SCI IDLE interrupts inhibited
1 = SCI IDLE interrupts enabled
0 = SCI transmitter disabled (TXD pin can be used as I/O)
1 = SCI transmitter enabled (TXD pin dedicated to SCI transmitter)
0 = SCI receiver disabled (status bits inhibited)
1 = SCI receiver enabled
0 = Normal receiver operation (received data recognized)
1 = Wakeup mode enabled (received data ignored until awakened)
0 = Normal operation
1 = Break frame(s) transmitted after completion of current frame
Freescale Semiconductor, Inc.
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REGISTER SUMMARY
D-21