MC68332GVEH25 Freescale Semiconductor, MC68332GVEH25 Datasheet - Page 6

• Manufacturer Part Number: MC68332GVEH25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332GVEH25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 132-QFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 25MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Paragraph
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.4.1
5.2.4.2
5.2.5
5.3
5.4
5.5
5.6
5.7
5.8
5.8.1
5.8.2
5.8.2.1
5.8.2.2
5.9
5.9.1
5.9.2
5.9.3
5.10
5.10.1
5.10.2
5.10.2.1
5.10.2.2
5.10.2.3
5.10.2.4
5.10.2.5
5.10.2.6
5.10.2.7
5.10.3
5.10.4
5.10.5
5.11
6.1
6.2
6.2.1
CPU32 Registers ............................................................................................ 5-2
Memory Organization ..................................................................................... 5-6
Virtual Memory ............................................................................................... 5-8
Addressing Modes .......................................................................................... 5-8
Processing States .......................................................................................... 5-8
Privilege Levels .............................................................................................. 5-9
Instructions ..................................................................................................... 5-9
Exception Processing ................................................................................... 5-13
Development Support ................................................................................... 5-15
Loop Mode Instruction Execution ................................................................. 5-23
General ........................................................................................................... 6-1
QSM Registers and Address Map .................................................................. 6-2
Data Registers ........................................................................................ 5-3
Address Registers .................................................................................. 5-5
Program Counter .................................................................................... 5-5
Control Registers .................................................................................... 5-5
Vector Base Register (VBR) ................................................................... 5-6
M68000 Family Compatibility ............................................................... 5-12
Special Control Instructions .................................................................. 5-13
Exception Vectors ................................................................................ 5-13
Types of Exceptions ............................................................................. 5-14
Exception Processing Sequence .......................................................... 5-15
M68000 Family Development Support ................................................. 5-15
Background Debugging Mode .............................................................. 5-16
Recommended BDM Connection ......................................................... 5-22
Deterministic Opcode Tracking ............................................................ 5-22
On-Chip Breakpoint Hardware ............................................................. 5-23
QSM Global Registers ........................................................................... 6-2
Status Register ............................................................................... 5-5
Alternate Function Code Registers ................................................ 5-6
Low Power Stop (LPSTOP) ......................................................... 5-13
Table Lookup and Interpolate (TBL) ............................................ 5-13
Enabling BDM .............................................................................. 5-17
BDM Sources ............................................................................... 5-17
Entering BDM ............................................................................... 5-18
BDM Commands .......................................................................... 5-19
Background Mode Registers ........................................................ 5-20
Returning from BDM .................................................................... 5-20
Serial Interface ............................................................................. 5-20
Freescale Semiconductor, Inc.
SECTION 6QUEUED SERIAL MODULE
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USER’S MANUAL
MC68332
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