ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 184

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

184
ATA6602/ATA6603
In SPI Slave mode, the control logic will sample the incoming signal of the SCK pin. To ensure
correct sampling of the clock signal, the frequency of the SPI clock should never exceed f
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overridden
according to
Functions” on page
Table 4-66.
Note:
The following code examples show how to initialize the SPI as a Master and how to perform a
simple transmission. DDR_SPI in the examples must be replaced by the actual Data Direction
Register controlling the SPI pins. DD_MOSI, DD_MISO and DD_SCK must be replaced by the
actual data direction bits for these pins. E.g. if MOSI is placed on pin PB5, replace DD_MOSI
with DDB5 and DDR_SPI with DDRB.
MOSI
MISO
SCK
Pin
SS
1. See
direction of the user defined SPI pins.
Table
SPI Pin Overrides
Direction, Master SPI
User Defined
Input
User Defined
User Defined
“Alternate Functions of Port B” on page 95
4-66. For more details on automatic port overrides, refer to
93.
(1)
for a detailed description of how to define the
Direction, Slave SPI
Input
User Defined
Input
Input
“Alternate Port
4921E–AUTO–09/09
osc
/4.