ATA6603P-PLQW Atmel, ATA6603P-PLQW Datasheet - Page 64

• Manufacturer Part Number: ATA6603P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6603P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.7.7.1
64
ATA6602/ATA6603
Power Reduction Register - PRR
Initial Value
Read/Write
• Bit 7 - PRTWI: Power Reduction TWI
• Bit 6 - PRTIM2: Power Reduction Timer/Counter2
• Bit 5 - PRTIM0: Power Reduction Timer/Counter0
• Bit 4 - Res: Reserved bit
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
• Bit 2 - PRSPI: Power Reduction Serial Peripheral Interface
• Bit 1 - PRUSART0: Power Reduction USART0
• Bit 0 - PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When
waking up the TWI again, the TWI should be re initialized to ensure proper operation.
Writing a logic one to this bit shuts down the Timer/Counter2 module in synchronous mode
(AS2 is 0). When the Timer/Counter2 is enabled, operation will continue like before the
shutdown.
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the
Timer/Counter0 is enabled, operation will continue like before the shutdown.
This bit is reserved in ATA6602/ATA6603 and will always read as zero.
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the
Timer/Counter1 is enabled, operation will continue like before the shutdown.
Writing a logic one to this bit shuts down the Serial Peripheral Interface by stopping the clock
to the module. When waking up the SPI again, the SPI should be re initialized to ensure
proper operation.
Writing a logic one to this bit shuts down the USART by stopping the clock to the module.
When waking up the USART again, the USART should be re initialized to ensure proper
operation.
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut
down. The analog comparator cannot use the ADC input MUX when the ADC is shut down.
Bit
PRTWI
R/W
7
0
PRTIM2
R/W
6
0
PRTIM0
R/W
5
0
R
4
–
0
PRTIM1
R/W
3
0
PRSPI
R/W
0
2
PRUSART0
R/W
1
0
PRADC
4921E–AUTO–09/09
R/W
0
0
PRR