ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 134

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.14.1.1
134
Atmel ATA6612/ATA6613
Registers
Figure 6-40. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Reg-
ister (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the
16-bit registers. These procedures are described in the section
on page
no CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals
are all visible in the Timer Interrupt Flag Register (TIFR1). All interrupts are individually
masked with the Timer Interrupt Mask Register (TIMSK1). TIFR1 and TIMSK1 are not shown
in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source
on the T1 pin. The Clock Select logic block controls which clock source and edge the
Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inactive when
no clock source is selected. The output from the Clock Select logic is referred to as the timer
clock (clk
1. Refer to
135. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have
T
1
).
placement and description.
Table 6-32 on page 97
Timer/Counter
TCCRnA
OCRnA
OCRnB
TCNTn
ICRn
=
=
Direction
Count
Clear
Control Logic
TOP
=
and
TCCRnB
Values
BOTTOM
Fixed
TOP
Table 6-38 on page 104
ICFn (Int.Req.)
Detector
clk
(1)
Edge
= 0
Tn
OCnA
(Int.Req.)
(Int.Req.)
OCnB
TOVn
(Int.Req.)
Clock Select
Generation
Generation
(From Prescaler)
Waveform
Waveform
Canceler
Detector
“Accessing 16-bit Registers”
Noise
Edge
for Timer/Counter1 pin
Comparator Ouput)
(From Analog
9111H–AUTO–01/11
OCnA
OCnB
ICPn
Tn