ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 162

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLQW

Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL
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5 000
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL/爱特梅尔
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6.15
6.15.1
Figure 6-53. 8-bit Timer/Counter Block Diagram
162
8-bit Timer/Counter2 with PWM and Asynchronous Operation
Atmel ATA6612/ATA6613
Overview
Timer/Counter
TCCRnA
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The main
features are:
A simplified block diagram of the 8-bit Timer/Counter is shown in
cific I/O Register and bit locations are listed in the
on page
The PRTIM2 bit in
enable Timer/Counter2 module.
OCRnA
TCNTn
OCRnB
=
=
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV2, OCF2A and OCF2B)
Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
174.
Direction
Count
Clear
Control Logic
“Power Reduction Register - PRR” on page 66
TOP
=
TCCRnB
BOTTOM
Fixed
Value
TOP
clk
= 0
TN
Prescaler
(Int.Req.)
(Int.Req.)
OCnB
OCnA
Generation
Generation
Waveform
Waveform
“8-bit Timer/Counter Register Description”
TOVn
(Int.Req.)
OCnA
OCnB
Oscillator
T/C
Figure
clk
I/O
must be written to zero to
6-53. The device-spe-
TOSC1
TOSC2
9111H–AUTO–01/11

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