ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 247

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLQW

Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Figure 6-88. Data Transfer in Master Transmitter Mode
9111H–AUTO–01/11
SDA
SCL
TRANSMITTER
Device 1
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the 2-wire Serial Interface, TWSTA must be written to one to
transmit a START condition and TWINT must be written to one to clear the TWINT Flag. The
TWI will then test the 2-wire Serial Bus and generate a START condition as soon as the bus
becomes free. After a START condition has been transmitted, the TWINT Flag is set by hard-
ware, and the status code in TWSR will be 0x08 (see
enter MT mode, SLA+W must be transmitted. This is done by writing SLA+W to TWDR.
Thereafter the TWINT bit should be cleared (by writing it to one) to continue the transfer. This
is accomplished by writing the following value to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received, TWINT
is set again and a number of status codes in TWSR are possible. Possible status codes in
Master mode are 0x18, 0x20, or 0x38. The appropriate action to be taken for each of these
status codes is detailed in
When SLA+W has been successfully transmitted, a data packet should be transmitted. This is
done by writing the data byte to TWDR. TWDR must only be written when TWINT is high. If
not, the access will be discarded, and the Write Collision bit (TWWC) will be set in the TWCR
Register. After updating TWDR, the TWINT bit should be cleared (by writing it to one) to con-
tinue the transfer. This is accomplished by writing the following value to TWCR:
This scheme is repeated until the last byte has been sent and the transfer is ended by gener-
ating a STOP condition or a repeated START condition. A STOP condition is generated by
writing the following value to TWCR:
MASTER
TWCR
TWCR
TWCR
TWCR
value
value
value
value
Device 2
RECEIVER
TWINT
TWINT
TWINT
TWINT
SLAVE
1
1
1
1
TWEA
TWEA
TWEA
TWEA
Device 3
X
X
X
X
Table 6-90 on page
TWSTA
TWSTA
TWSTA
TWSTA
1
0
0
0
........
TWSTO
TWSTO
TWSTO
TWSTO
Atmel ATA6612/ATA6613
Device n
248.
0
0
0
1
V
CC
TWWC
TWWC
TWWC
TWWC
Table 6-90 on page
X
X
X
X
R1
TWEN
TWEN
TWEN
TWEN
1
1
1
1
R2
248). In order to
0
0
0
0
TWIE
TWIE
TWIE
TWIE
X
X
X
X
247

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