ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 229

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLQW

Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
6.18.7
9111H–AUTO–01/11
AVR USART MSPIM versus AVR SPI
The USART in MSPIM mode is fully compatible with the AVR
However, since the USART in MSPIM mode reuses the USART resources, the use of the
USART in MSPIM mode is somewhat different compared to the SPI. In addition to differences
of the control register bits, and that only master operation is supported by the USART in
MSPIM mode, the following features differ between the two modules:
A comparison of the USART in MSPIM mode and the SPI pins is shown in
Table 6-86.
• Master mode timing diagram.
• The UCPOLn bit functionality is identical to the SPI CPOL bit.
• The UCPHAn bit functionality is identical to the SPI CPHA bit.
• The UDORDn bit functionality is identical to the SPI DORD bit.
• The USART in MSPIM mode includes (double) buffering of the transmitter. The SPI has no
• The USART in MSPIM mode receiver includes an additional buffer level.
• The SPI WCOL (Write Collision) bit is not included in USART in MSPIM mode.
• The SPI double speed mode (SPI2X) bit is not included. However, the same effect is
• Interrupt timing is not compatible.
• Pin control differs due to the master only operation of the USART in MSPIM mode.
buffer.
achieved by setting UBRRn accordingly.
USART_MSPIM
RxDn
XCKn
TxDn
(N/A)
Comparison of USART in MSPIM Mode and SPI Pins.
MISO
MOSI
SCK
SPI
SS
Atmel ATA6612/ATA6613
Comment
Master Out only
Master In only
(Functionally identical)
Not supported by USART in MSPIM
®
SPI regarding:
Table
6-86.
229

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