PIC18LF4455-I/PT Microchip Technology, PIC18LF4455-I/PT Datasheet - Page 168

• Manufacturer Part Number: PIC18LF4455-I/PT
• Description: IC PIC MCU FLASH 12KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4455-I/PT

• Core Size: 8-Bit
• Program Memory Size: 24KB (12K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 2048Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2455/2550/4455/4550
17.2
The operation of the USB module is configured and
managed through three control registers. In addition, a
total of 22 registers are used to manage the actual USB
transactions. The registers are:
• USB Control register (UCON)
• USB Configuration register (UCFG)
• USB Transfer Status register (USTAT)
• USB Device Address register (UADDR)
• Frame Number registers (UFRMH:UFRML)
• Endpoint Enable registers 0 through 15 (UEPn)
17.2.1
The USB Control register (Register 17-1) contains bits
needed to control the module behavior during transfers.
The register contains bits that control the following:
• Main USB Peripheral Enable
• Ping-Pong Buffer Pointer Reset
• Control of the Suspend mode
• Packet Transfer Disable
REGISTER 17-1:
DS39632E-page 166
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
USB Status and Control
USB CONTROL REGISTER (UCON)
Unimplemented: Read as ‘0’
PPBRST: Ping-Pong Buffers Reset bit
1 = Reset all Ping-Pong Buffer Pointers to the Even Buffer Descriptor (BD) banks
0 = Ping-Pong Buffer Pointers not being reset
SE0: Live Single-Ended Zero Flag bit
1 = Single-ended zero active on the USB bus
0 = No single-ended zero detected
PKTDIS: Packet Transfer Disable bit
1 = SIE token and packet processing disabled, automatically set when a SETUP token is received
0 = SIE token and packet processing enabled
USBEN: USB Module Enable bit
1 = USB module and supporting circuitry enabled (device attached)
0 = USB module and supporting circuitry disabled (device detached)
RESUME: Resume Signaling Enable bit
1 = Resume signaling activated
0 = Resume signaling disabled
SUSPND: Suspend USB bit
1 = USB module and supporting circuitry in Power Conserve mode, SIE clock inactive
0 = USB module and supporting circuitry in normal operation, SIE clock clocked at the configured rate
Unimplemented: Read as ‘0’
PPBRST
R/W-0
UCON: USB CONTROL REGISTER
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
SE0
R-x
PKTDIS
R/C-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
USBEN
R/W-0
In addition, the USB Control register contains a status bit,
SE0 (UCON<5>), which is used to indicate the occur-
rence of a single-ended zero on the bus. When the USB
module is enabled, this bit should be monitored to deter-
mine whether the differential data lines have come out of
a single-ended zero condition. This helps to differentiate
the initial power-up state from the USB Reset signal.
The overall operation of the USB module is controlled by
the USBEN bit (UCON<3>). Setting this bit activates the
module and resets all of the PPBI bits in the Buffer
Descriptor Table to ‘0’. This bit also activates the on-chip
voltage regulator (if the VREGEN Configuration bit is
set) and connects internal pull-up resistors, if they are
enabled. Thus, this bit can be used as a soft
attach/detach to the USB. Although all status and control
bits are ignored when this bit is clear, the module needs
to be fully preconfigured prior to setting this bit.
Note:
When disabling the USB module, make
sure the SUSPND bit (UCON<1>) is clear
prior to clearing the USBEN bit. Clearing
the USBEN bit when the module is in the
suspended state may prevent the module
from fully powering down.
RESUME
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
SUSPND
R/W-0
U-0
—
bit 0