PIC18LF4455-I/PT Microchip Technology, PIC18LF4455-I/PT Datasheet - Page 189

IC PIC MCU FLASH 12KX16 44TQFP

PIC18LF4455-I/PT

Manufacturer Part Number
PIC18LF4455-I/PT
Description
IC PIC MCU FLASH 12KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF4455-I/PT

Core Size
8-Bit
Program Memory Size
24KB (12K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
2048Byte
Cpu Speed
48MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, I2C, EAUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Package
44TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF4455-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18LF4455-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
17.7
The Streaming Parallel Port (SPP) is an alternate route
option for data besides USB RAM. Using the SPP, an
endpoint can be configured to send data to or receive
data directly from external hardware.
This methodology presents design possibilities where
the microcontroller acts as a data manager, allowing
the SPP to pass large blocks of data without the micro-
controller actually processing it. An application
example might include a data acquisition system,
where data is streamed from an external FIFO through
USB to the host computer. In this case, endpoint
control is managed by the microcontroller and raw data
movement is processed externally.
The SPP is enabled as a USB endpoint port through
the associated endpoint buffer descriptor. The endpoint
must be enabled as follows:
1.
2.
3.
TABLE 17-6:
© 2009 Microchip Technology Inc.
INTCON
IPR2
PIR2
Legend:
Note 1:
Name
Set BDnADRL:BDnADRH to point to FFFFh.
Set the KEN bit (BDnSTAT<5>) to let SIE keep
control of the buffer.
Set the INCDIS bit (BDnSTAT<4>) to disable
automatic address increment.
Streaming Parallel Port
— = unimplemented, read as ‘0’. Shaded cells are not used by the USB module.
This table includes only those hardware mapped SFRs located in Bank 15 of the data memory space. The Buffer
Descriptor registers, which are mapped into Bank 4 and are not true SFRs, are listed separately in Table 17-5.
GIE/GIEH
OSCFIP
OSCFIF
Bit 7
REGISTERS ASSOCIATED WITH USB MODULE OPERATION
PEIE/GIEL
CMIP
CMIF
Bit 6
TMR0IE
USBIP
USBIF
Bit 5
PIC18F2455/2550/4455/4550
INT0IE
Bit 4
EEIP
EEIF
BCLIP
BCLIF
RBIE
Bit 3
Refer to Section 18.0 “Streaming Parallel Port” for
more information about the SPP.
17.8
The USB module has specific clock requirements. For
full-speed operation, the clock source must be 48 MHz.
Even so, the microcontroller core and other peripherals
are not required to run at that clock speed or even from
the same clock source. Available clocking options are
described in detail in Section 2.3 “Oscillator Settings
for USB”.
Note 1: If an endpoint is configured to use the
2: In addition, if an endpoint is configured to
Oscillator
TMR0IF
HLVDIP
HLVDIF
Bit 2
SPP, the SPP module must also be
configured to use the USB module.
Otherwise, unexpected operation may
occur.
use the SPP, the data transfer type of that
endpoint must be isochronous only.
TMR3IP
TMR3IF
INT0IF
Bit 1
(1)
CCP2IP
CCP2IF
RBIF
Bit 0
DS39632E-page 187
Details on
page
53
56
56

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