PIC18LF4455-I/PT Microchip Technology, PIC18LF4455-I/PT Datasheet - Page 426

• Manufacturer Part Number: PIC18LF4455-I/PT
• Description: IC PIC MCU FLASH 12KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4455-I/PT

• Core Size: 8-Bit
• Program Memory Size: 24KB (12K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 2048Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, I2C, EAUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163025
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 48 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F2455/2550/4455/4550
C
C Compilers
CALL ................................................................................ 328
CALLW ............................................................................. 357
Capture (CCP Module) ..................................................... 145
Capture (ECCP Module) .................................................. 152
Capture/Compare (CCP Module)
Capture/Compare/PWM (CCP) ........................................ 143
Clock Sources .................................................................... 32
CLRF ................................................................................ 329
CLRWDT .......................................................................... 329
Code Examples
Code Protection ............................................................... 291
COMF ............................................................................... 330
Comparator ...................................................................... 275
DS39632E-page 424
MPLAB C18 ............................................................. 364
MPLAB C30 ............................................................. 364
CCP Pin Configuration ............................................. 145
CCPRxH:CCPRxL Registers ................................... 145
Prescaler .................................................................. 145
Software Interrupt .................................................... 145
Timer1/Timer3 Mode Selection ................................ 145
Associated Registers ............................................... 147
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 144
CCP2 Pin Assignment ............................................. 144
CCPRxH Register .................................................... 144
CCPRxL Register ..................................................... 144
Compare Mode. See Compare.
Interaction of Two CCP Modules for
Module Configuration ............................................... 144
Effects of Power-Managed Modes ............................. 34
Selecting the 31 kHz Source ...................................... 32
Selection Using OSCCON Register ........................... 32
16 x 16 Signed Multiply Routine ................................ 98
16 x 16 Unsigned Multiply Routine ............................ 98
8 x 8 Signed Multiply Routine .................................... 97
8 x 8 Unsigned Multiply Routine ................................ 97
Changing Between Capture Prescalers ................... 145
Computed GOTO Using an Offset Value ................... 62
Data EEPROM Read ................................................. 93
Data EEPROM Refresh Routine ................................ 94
Data EEPROM Write ................................................. 93
Erasing a Flash Program Memory Row ..................... 86
Executing Back to Back SLEEP Instructions ............. 36
Fast Register Stack .................................................... 62
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock Using
Initializing PORTA .................................................... 113
Initializing PORTB .................................................... 116
Initializing PORTC .................................................... 119
Initializing PORTD .................................................... 122
Initializing PORTE .................................................... 125
Loading the SSPBUF (SSPSR) Register ................. 200
Reading a Flash Program Memory Word .................. 85
Saving STATUS, WREG and BSR
Writing to Flash Program Memory ....................... 88–89
Analog Input Connection Considerations ................. 279
Associated Registers ............................................... 279
Configuration ............................................................ 276
Effects of a Reset ..................................................... 278
Timer Resources .............................................. 144
Indirect Addressing ............................................ 74
a Timer1 Interrupt Service ............................... 135
Registers in RAM ............................................. 111
Comparator Specifications ............................................... 382
Comparator Voltage Reference ....................................... 281
Compare (CCP Module) .................................................. 146
Compare (ECCP Module) ................................................ 152
Configuration Bits ............................................................ 292
Configuration Register Protection .................................... 311
Context Saving During Interrupts ..................................... 111
Conversion Considerations .............................................. 420
CPFSEQ .......................................................................... 330
CPFSGT .......................................................................... 331
CPFSLT ........................................................................... 331
Crystal Oscillator/Ceramic Resonator ................................ 25
Customer Change Notification Service ............................ 433
Customer Notification Service ......................................... 433
Customer Support ............................................................ 433
D
Data Addressing Modes .................................................... 74
Data EEPROM
Data EEPROM Memory ..................................................... 91
Data Memory ..................................................................... 65
DAW ................................................................................ 332
Interrupts ................................................................. 278
Operation ................................................................. 277
Operation During Sleep ........................................... 278
Outputs .................................................................... 277
Reference ................................................................ 277
Response Time ........................................................ 277
Accuracy and Error .................................................. 282
Associated Registers ............................................... 283
Configuring .............................................................. 281
Connection Considerations ...................................... 282
Effects of a Reset .................................................... 282
Operation During Sleep ........................................... 282
CCP Pin Configuration ............................................. 146
CCPRx Register ...................................................... 146
Software Interrupt .................................................... 146
Special Event Trigger .............................. 141, 146, 274
Timer1/Timer3 Mode Selection ................................ 146
Special Event Trigger .............................................. 152
Comparing Addressing Modes with the
Direct ......................................................................... 74
Indexed Literal Offset ................................................ 77
Indirect ....................................................................... 74
Inherent and Literal .................................................... 74
Code Protection ....................................................... 311
Associated Registers ................................................. 95
EECON1 and EECON2 Registers ............................. 91
Operation During Code-Protect ................................. 94
Protection Against Spurious Write ............................. 94
Reading ..................................................................... 93
Using ......................................................................... 94
Write Verify ................................................................ 93
Writing ....................................................................... 93
Access Bank .............................................................. 67
and the Extended Instruction Set .............................. 77
Bank Select Register (BSR) ...................................... 65
General Purpose Registers ....................................... 67
Map for PIC18F2455/2550/4455/4550 Devices ......... 66
Special Function Registers ........................................ 68
USB RAM .................................................................. 65
External Signal ................................................ 277
Internal Signal .................................................. 277
Extended Instruction Set Enabled ..................... 78
Map .................................................................... 68
© 2009 Microchip Technology Inc.