PIC32MX795F512L-80I/PF Microchip Technology, PIC32MX795F512L-80I/PF Datasheet - Page 125

• Manufacturer Part Number: PIC32MX795F512L-80I/PF
• Description: IC MCU 32BIT 512KB FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX795F512L-80I/PF

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Controller Family/series: PIC32
• Ram Memory Size: 128KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: CAN, I2C, SPI, UART, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX7xx
• Core: MIPS
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.0
This family of PIC32MX devices features four
synchronous 16-bit timers (default) that can operate as
a free-running interval timer for various timing applica-
tions and counting external events. The following
modes are supported:
• Synchronous Internal 16-bit Timer
• Synchronous Internal 16-bit Gated Timer
• Synchronous External 16-bit Timer
FIGURE 14-1:
 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note 1: ADC event trigger is available on Timer3 only.
TxCK
Trigger
ADC Event
2: Some registers and associated bits
TxIF
Event Flag
TIMER2/3, TIMER4/5
2: TxCK pins are not available on 64-pin devices.
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 14. “Timers”
(DS61105) of the “PIC32MX Family
Reference Manual” , which is available
from
(www.microchip.com/PIC32).
described in this section may not be avail-
able
4.0 “Memory Organization” in this data
sheet for device-specific register and bit
information.
(2)
(1)
on
TGATE (TxCON<7>)
the
TIMER2, 3, 4, 5 BLOCK DIAGRAM (16-BIT)
0
1
all
Microchip
Reset
Equal
devices.
Comparator x 16
web
Refer
TMRx
PRx
site
Preliminary
Q
Q
PBCLK
to
Gate
Sync
D
PIC32MX5XX/6XX/7XX
Two 32-bit synchronous timers are available by
combining Timer2 with Timer3 and Timer4 with Timer5.
The 32-bit timers can operate in three modes:
• Synchronous Internal 32-bit Timer
• Synchronous Internal 32-bit Gated Timer
• Synchronous External 32-bit Timer
14.1
• Selectable Clock Prescaler
• Timers Operational during CPU Idle
• Time Base for Input Capture and Output Compare
• ADC Event Trigger (Timer3 only)
• Fast Bit Manipulation using CLR, SET and INV
Note:
modules (Timer2 and Timer3 only)
Registers
Additional Supported Features
1 0
0 0
x 1
In this chapter, references to registers
TxCON, TMRx, and PRx use ‘x’ to repre-
sent Timer2 through 5 in 16-bit modes. In
32-bit modes, ‘x’ represents Timer2 or 4;
‘y’ represents Timer3 or 5.
TCKPS (TxCON<6:4>)
TGATE (TxCON<7>)
TCS (TxCON<1>)
ON (TxCON<15>)
1, 2, 4, 8, 16,
32, 64, 256
Prescaler
Sync
DS61156B-page 125
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