PIC32MX795F512L-80I/PF Microchip Technology, PIC32MX795F512L-80I/PF Datasheet - Page 86

• Manufacturer Part Number: PIC32MX795F512L-80I/PF
• Description: IC MCU 32BIT 512KB FLASH 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX795F512L-80I/PF

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Controller Family/series: PIC32
• Ram Memory Size: 128KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: CAN, I2C, SPI, UART, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: CAN, I2C, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX7xx
• Core: MIPS
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

TABLE 4-30:
TABLE 4-31:
Legend:
Note
Legend:
Note
6100
6110
6120
6130
6100
6110
6120
6130
PORTE
1:
PORTE
1:
TRISE
ODCE
TRISE
ODCE
LATE
LATE
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET, and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8, and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORT E REGISTER MAP FOR PIC32MX575F256H, PIC32MX575F512H, PIC32MX675F512H, PIC32MX695F512H, AND
PIC32MX795F512H DEVICES
PORT E REGISTER MAP FOR PIC32MX575F256L, PIC32MX575F512L, PIC32MX675F512L, PIC32MX695F512L, AND
PIC32MX795F512L DEVICES
31/15
31/15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30/14
30/14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
29/13
29/13
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
28/12
28/12
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
(1)
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISE9
ODCE9
LATE9
25/9
25/9
RE9
—
—
—
—
—
—
—
—
—
—
—
—
TRISE8
ODCE8
LATE8
24/8
24/8
RE8
—
—
—
—
—
—
—
—
—
—
—
—
Bits
Bits
TRISE7
ODCE7
TRISE7
ODCE7
LATE7
LATE7
23/7
23/7
RE7
RE7
—
—
—
—
—
—
—
—
TRISE6
TRISE6
0DCE6
0DCE6
LATE6
LATE6
22/6
22/6
RE6
RE6
—
—
—
—
—
—
—
—
TRISE5
ODCE5
TRISE5
ODCE5
LATE5
LATE5
21/5
21/5
RE5
RE5
—
—
—
—
—
—
—
—
TRISE4
TRISE4
ODCE4
ODCE4
LATE4
LATE4
20/4
20/4
RE4
RE4
—
—
—
—
—
—
—
—
TRISE3
ODCE3
TRISE3
ODCE3
LATE3
LATE3
19/3
RE3
19/3
RE3
—
—
—
—
—
—
—
—
TRISE2
ODCE2
TRISE2
ODCE2
LATE2
LATE2
18/2
18/2
RE2
RE2
—
—
—
—
—
—
—
—
TRISE1
ODCE1
TRISE1
ODCE1
LATE1
LATE1
17/1
17/1
RE1
RE1
—
—
—
—
—
—
—
—
TRISE0
ODCE0
TRISE0
ODCE0
LATE0
LATE0
16/0
16/0
RE0
RE0
—
—
—
—
—
—
—
—
0000
03FF
0000
xxxx
0000
xxxx
0000
0000
0000
00FF
0000
xxxx
0000
xxxx
0000
0000