P87LPC760BDH,112 NXP Semiconductors, P87LPC760BDH,112 Datasheet - Page 22

IC 80C51 MCU 1K OTP 14-TSSOP

P87LPC760BDH,112

Manufacturer Part Number
P87LPC760BDH,112
Description
IC 80C51 MCU 1K OTP 14-TSSOP
Manufacturer
NXP Semiconductors
Series
LPC700r
Datasheet

Specifications of P87LPC760BDH,112

Program Memory Type
OTP
Program Memory Size
1KB (1K x 8)
Package / Case
14-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, WDT
Number Of I /o
12
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Processor Series
P87LPC7x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C/UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1015-5
935271146112
P87LPC760BDH
1. See Table 4, Port Output Configuration Settings.
Philips Semiconductors
Keyboard Interrupt (KBI)
The Keyboard Interrupt function is intended primarily to allow a
single interrupt to be generated when any key is pressed on a
keyboard or keypad connected to specific pins of the P87LPC760,
as shown in Figure 14. This interrupt may be used to wake up the
CPU from Idle or Power Down modes. This feature is particularly
useful in handheld, battery powered systems that need to carefully
manage power consumption yet also need to be convenient to use.
The P87LPC760 allows any pin of port 0 to be enabled to cause this
interrupt. Port pins are enabled by the setting of bits in the KBI
register, as shown in Figure 15. The Keyboard Interrupt Flag (KBF)
in the AUXR1 register is set when any enabled pin is pulled low
while the KBI interrupt function is active. An interrupt will generated
if it has been enabled. Note that the KBF bit must be cleared by
software.
2002 Mar 07
P2M1
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
BIT
P2M1.7
P2M1.6
P2M1.5
P2M1.4
P2M1.2
P2M1.1, P2M1.0
Address: A4h
Not Bit Addressable
SYMBOL
ENCLK
T0OE
P2S
P1S
P0S
P2S
7
FUNCTION
When P2S = 1, this bit enables Schmitt trigger inputs on Port 2.
When P1S = 1, this bit enables Schmitt trigger inputs on Port 1.
When P0S = 1, this bit enables Schmitt trigger inputs on Port 0.
When ENCLK is set and the 87LPC760 is configured to use the on-chip RC oscillator, a clock
output is enabled on the X2 pin (P2.0). Refer to the Oscillator section for details.
When set, the P1.2 pin is toggled whenever Timer 0 overflows. The output frequency is therefore
one half of the Timer 0 overflow rate. Refer to the Timer/Counters section for details.
These bits, along with the matching bits in the P2M2 register, control the output configuration of
P2.1 and P2.0 respectively
P1S
6
Figure 13. Port 2 Mode Register 1 (P2M1)
P0S
5
ENCLK
1
4
.
19
Due to human time scales and the mechanical delay associated with
keyswitch closures, the KBI feature will typically allow the interrupt
service routine to poll port 0 in order to determine which key was
pressed, even if the processor has to wake up from Power Down
mode. Refer to the section on Power Reduction Modes for details.
3
T0OE
2
(P2M1.1)
1
(P2M1.0)
0
Reset Value: 00h
P87LPC760
SU01535
Preliminary data

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