ST7FLI49MK1T6 STMicroelectronics, ST7FLI49MK1T6 Datasheet - Page 11

MCU 8BIT SGL VOLT FLASH 32-LQFP

ST7FLI49MK1T6

Manufacturer Part Number
ST7FLI49MK1T6
Description
MCU 8BIT SGL VOLT FLASH 32-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLI49MK1T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FLI4x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ST7LITE49M
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Block diagram of One-pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
One-pulse mode and PWM timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Dynamic DCR2/3 update in One-pulse mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Force overflow timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Lite timer 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Input capture timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
I
I
Transfer sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Event flags and interrupt generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
ADC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
fCPU maximum operating frequency versus VDD supply voltage . . . . . . . . . . . . . . . . . . 142
Frequency vs voltage at four different ambient temperatures (RC at 5 V) . . . . . . . . . . . . 145
Frequency vs voltage at four different ambient temperatures (RC at 3.3 V). . . . . . . . . . . 145
Accuracy in % vs voltage at 4 different ambient temperatures (RC at 5 V) . . . . . . . . . . . 146
Accuracy in % vs voltage at 4 different ambient temperatures
(RC at 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Typical IDD in Run mode vs. fCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Typical IDD in WFI vs. fCPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Typical IDD in slow mode vs. fCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Typical IDD in Slow-wait mode vs. fCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Typical IDD vs. temperature at VDD = 5 V and fCPU = 8 MHz . . . . . . . . . . . . . . . . . . . . 149
Typical application with an external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Typical application with a crystal or ceramic resonator. . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Two typical applications with unused I/O pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
R
I
Typical VOL at VDD = 2.4 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Typical VOL at VDD = 3 V (standard). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Typical VOL at VDD = 5 V (standard). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Typical VOL at VDD = 2.4 V (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Typical VOL at VDD = 3 V (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Typical VOL at VDD = 5 V (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Typical VOL vs. VDD at I
Typical VOL vs. VDD at I
Typical VOL vs VDD at I
Typical VOL vs VDD at
Typical VOL vs VDD at I
Typical VDD-VOH vs. IIO at VDD = 2.4 V (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Typical VDD-VOH vs. IIO at VDD = 3 V (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Typical VDD-VOH vs. IIO at VDD = 5 V (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Typical VDD-VOH vs. IIO at VDD = 2.4 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Typical VDD-VOH vs. IIO at VDD = 3 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Typical VDD-VOH vs. IIO at VDD = 5 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Typical VDD-VOH vs. V
Typical VDD-VOH vs. VDD at IIO = 4 mA (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
RESET pin protection when LVD is enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
RESET pin protection when LVD is disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Typical application with ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
2
2
pu
C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
C interface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
pu
current versus voltage at four different temperatures . . . . . . . . . . . . . . . . . . . . . . . . . 159
resistance versus voltage at four different temperatures . . . . . . . . . . . . . . . . . . . . . . 159
IO
DD
IO
IO
IO
IO
= 8 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
= 2 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
= 12 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
at IIO = 2 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
= 2 mA (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
= 4 mA (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Doc ID 13562 Rev 3
List of figures
11/188

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