Z8F012ASB020EG Zilog, Z8F012ASB020EG Datasheet - Page 144

• Manufacturer Part Number: Z8F012ASB020EG
• Description: IC ENCORE XP MCU FLASH 1K 8SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F012ASB020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: Z8F012Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4038; Z8F012ASB020EG

Table 73. ADC Data High Byte Register (ADCD_H)
Table 74. ADC Data Low Byte Register (ADCD_L)
BITS
FIELD
RESET
R/W
ADDR
X = Undefined.
BITS
FIELD
RESET
R/W
ADDR
X = Undefined.
PS022825-0908
ADC Data Low Byte Register
R
R
7
X
7
X
ADCDH—ADC Data High Byte
This byte contains the upper eight bits of the ADC output. These bits are not valid during a
single-shot conversion. During a continuous conversion, the most recent conversion out-
put is held in this register. These bits are undefined after a Reset.
The ADC Data Low Byte (ADCD_L) register contains the lower bits of the ADC output
as well as an overflow status bit. The output is a 13-bit two’s complement value. During a
single-shot conversion, this value is invalid. Access to the ADC Data Low Byte register is
read-only. Reading the ADC Data High Byte register latches data in the ADC Low Bits
register.
ADCDL—ADC Data Low Bits
These bits are the least significant five bits of the 13-bits of the ADC output. These bits are
undefined after a Reset.
Reserved—Must be undefined.
OVF—Overflow Status
0= A hardware overflow did not occur in the ADC for the current sample.
1= A hardware overflow did occur in the ADC for the current sample, therefore the
current sample is invalid.
X
R
X
R
6
6
ADCDL
R
R
X
X
5
5
X
R
X
R
4
4
ADCDH
F72H
F73H
R
R
X
X
3
3
Z8 Encore! XP
X
R
X
R
2
2
Reserved
Product Specification
Analog-to-Digital Converter
R
R
X
X
1
1
®
F082A Series
OVF
X
R
X
R
0
0
133