ST72F623F2M1TR STMicroelectronics, ST72F623F2M1TR Datasheet - Page 67

IC MCU 8BIT 8K FLASH 20-SOIC

ST72F623F2M1TR

Manufacturer Part Number
ST72F623F2M1TR
Description
IC MCU 8BIT 8K FLASH 20-SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST72F623F2M1TR

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
11
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ST72F6x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI, USB
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
11
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 3 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
10.5 SERIAL COMMUNICATIONS INTERFACE (SCI)
10.5.1 Introduction
The Serial Communications Interface (SCI) offers
a flexible means of full-duplex data exchange with
external equipment requiring an industry standard
NRZ asynchronous serial data format. The SCI of-
fers a very wide range of baud rates using two
baud rate generator systems.
10.5.2 Main Features
– Address bit (MSB)
– Idle line
– Overrun error
– Noise error
– Frame error
– Parity error
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error detected
– Transmits parity bit
– Checks parity of received data byte
Full duplex, asynchronous communications
NRZ standard format (Mark/Space)
Dual baud rate generator systems
Independently programmable transmit and
receive baud rates up to 500K baud
Programmable data word length (8 or 9 bits)
Receive buffer full, Transmit buffer empty and
End of Transmission flags
Two receiver wake-up modes:
Muting function for multiprocessor configurations
Separate enable bits for Transmitter and
Receiver
Four error detection flags:
Five interrupt sources with flags:
Parity control:
Reduced power consumption mode
Doc ID 6996 Rev 5
10.5.3 General Description
The interface is externally connected to another
device by two pins (see
– TDO: Transmit Data Output. When the transmit-
– RDI: Receive Data Input is the serial data input.
Through these pins, serial data is transmitted and
received as frames comprising:
– An Idle Line prior to transmission or reception
– A start bit
– A data word (8 or 9 bits) least significant bit first
– A Stop bit indicating that the frame is complete
This interface uses two types of baud rate generator:
– A conventional type for commonly-used baud
– An extended type with a prescaler offering a very
ter and the receiver are disabled, the output pin
returns to its I/O port configuration. When the
transmitter and/or the receiver are enabled and
nothing is to be transmitted, the TDO pin is at
high level.
Oversampling techniques are used for data re-
covery by discriminating between valid incoming
data and noise.
rates
wide range of baud rates even with non-standard
oscillator frequencies
Figure
47):
ST7262xxx
67/139

Related parts for ST72F623F2M1TR