ST10F272M-4T3 STMicroelectronics, ST10F272M-4T3 Datasheet - Page 105

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ST10F272M-4T3

Manufacturer Part Number
ST10F272M-4T3
Description
MCU 16BIT 256K FLASH 144-LQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F272M-4T3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-MQFP, 144-PQFP
Processor Series
ST10F27x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Part Number:
ST10F272M-4T3
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Quantity:
10 000
ST10F272M
21.3.2
21.3.3
Exiting stand-by mode
After the system has entered the stand-by mode, the procedure to exit this mode consists of
a standard power-on sequence, with the only difference that the RAM is already powered
through V
It is recommended to held the device under reset (RSTIN pin forced low) until external V
voltage pin is stable. Even though, at the very beginning of the power-on phase, the device
is maintained under reset by the internal low voltage detector circuit (implemented inside the
main voltage regulator) till the internal V
guaranty that the device stays under reset status if RSTIN is at high level during power ramp
up. So, it is important the external hardware is able to guarantee a stable ground level on
RSTIN along the power-on phase, without any temporary glitch.
The external hardware is responsible for driving the RSTIN pin low until the V
even though the internal LVD is active.
Once the internal reset signal goes low, the RAM (still frozen) power supply is switched to
the main V
At this time, everything becomes stable, and the execution of the initialization routines can
start: XRAM2EN bit can be set, enabling the RAM.
Real-time clock and stand-by mode
When stand-by mode is entered (turning off the main supply V
counting can be maintained running in case the on-chip 32 kHz oscillator is used to provide
the reference to the counter. This is not possible if the main oscillator is used as reference
for the counter: Being the main oscillator powered by V
oscillator is stopped.
Warning:
18SB
18
.
internal reference (derived from V
During power-off phase, it is important that the external
hardware maintains a stable ground level on RSTIN pin,
without any glitch, in order to avoid spurious exiting from
reset status with unstable power supply.
18
becomes higher than about 1.0 V, there is no
STBY
pin external voltage).
DD
, once this is switched off, the
DD
), the real-time clock
Power reduction modes
DD
is stable,
105/176
DD

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