MC9S08AC16CFGE Freescale Semiconductor, MC9S08AC16CFGE Datasheet - Page 99

IC MCU 8BIT 16K FLASH 44-LQFP

MC9S08AC16CFGE

Manufacturer Part Number
MC9S08AC16CFGE
Description
IC MCU 8BIT 16K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AC16CFGE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Package
44LQFP
Family Name
HCS08
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
I2C/SCI/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
8
Processor Series
S08AC
Core
HCS08
Data Ram Size
1 KB
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1KB
# I/os (max)
34
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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1
6.7.9
Port E parallel I/O function is controlled by the registers listed below.
Freescale Semiconductor
PTDDS[3:0]
Bits 7 through 4 are reserved bits that must always be written to 0.
PTED[7:0]
Reset
Reset
Field
Field
3:0
7:0
W
W
R
R
PTED7
Port E I/O Registers (PTED and PTEDD)
Output Drive Strength Selection for Port D Bits — Each of these control bits selects between low and high
output drive for the associated PTD pin.
0 Low output drive enabled for port D bit n.
1 High output drive enabled for port D bit n.
Port E Data Register Bits — For port E pins that are inputs, reads return the logic level on the pin. For port E
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port E pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTED to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
R
0
0
7
7
Figure 6-29. Output Drive Strength Selection for Port D (PTDDS)
PTED6
R
0
0
6
6
Table 6-20. PTDDS Register Field Descriptions
Table 6-21. PTED Register Field Descriptions
Figure 6-30. Port E Data Register (PTED)
MC9S08AC16 Series Data Sheet, Rev. 8
PTED5
R
0
0
5
5
PTED4
R
0
0
4
4
Description
Description
PTDDS3
PTED3
3
0
3
0
PTDDS2
PTED2
0
0
2
2
Chapter 6 Parallel Input/Output
1
PTDDS1
PTED1
0
0
1
1
PTDDS0
PTED0
0
0
0
0
99

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