MCHC908GR8ACFAE Freescale Semiconductor, MCHC908GR8ACFAE Datasheet - Page 143

• Manufacturer Part Number: MCHC908GR8ACFAE
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

13.3.2 Sources
The sources in
13.3.2.1 Software Interrupt (SWI) Instruction
The software interrupt instruction (SWI) causes a non-maskable interrupt.
Freescale Semiconductor
Reset
SWI instruction
IRQ pin
ICG clock monitor
TIM1 channel 0
TIM1 channel 1
TIM1 overflow
TIM2 channel 0
TIM2 channel 1
TIM2 overflow
SPI receiver full
SPI overflow
SPI mode fault
SPI transmitter empty
SCI receiver overrun
SCI noise fag
SCI framing error
SCI parity error
SCI receiver full
SCI input idle
SCI transmitter empty
SCI transmission complete
Keyboard pin
ADC conversion complete
Timebase
1. The I bit in the condition code register is a global mask for all interrupt sources except the SWI instruction.
2. 0 = highest priority
Source
modifies the H register or uses the indexed addressing mode, save the H
register and then restore it prior to exiting the routine.
A software interrupt pushes PC onto the stack. An SWI does not push PC
– 1, as a hardware interrupt does.
Table 13-1
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
can generate CPU interrupt requests.
MODF
COCO
SPRF
OVRF
SCRF
SCTE
CH0F
CH1F
CH0F
CH1F
SPTE
KEYF
None
None
IRQF
IDLE
CMF
TBIF
Flag
TOF
TOF
OR
NF
PE
TC
FE
Table 13-1. Interrupt Sources
IMASKK
IMASK1
Mask
SPRIE
ERRIE
ERRIE
SCRIE
CH0IE
CH1IE
CH0IE
CH1IE
SPTIE
SCTIE
CMIE
ORIE
None
None
NEIE
AIEN
TOIE
TOIE
FEIE
PEIE
TCIE
TBIE
ILIE
(1)
NOTE
INT Register
None
None
Flag
IF10
IF11
IF12
IF13
IF15
IF16
IF14
IF1
IF2
IF3
IF4
IF5
IF6
IF7
IF8
IF9
Priority
10
11
12
13
14
15
16
0
0
1
2
3
4
5
6
7
8
9
(2)
Vector Address
$FFDC–$FFDD
$FFFC
$FFEC–$FFED
$FFDE–$FFDF
$FFFE
$FFFA
$FFEE–$FFEF
$FFEA–$FFEB
$FFF8–$FFF9
$FFE8–$FFE9
$FFE6–$FFE7
$FFE4–$FFE5
$FFE2–$FFE3
$FFE0–$FFE1
$FFF6–$FFF7
$FFF4–$FFF5
$FFF2–$FFF3
$FFF0–$FFF1
–
–
–
$FFFB
$FFFF
$FFFD
Interrupts
143