MC9S12XEQ384MAG Freescale Semiconductor, MC9S12XEQ384MAG Datasheet - Page 246

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MC9S12XEQ384MAG

Manufacturer Part Number
MC9S12XEQ384MAG
Description
MCU 16BIT 384K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEQ384MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
24 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
119
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Package
144LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 5 External Bus Interface (S12XEBIV4)
5.1.1
5.1.2
The XEBI includes the following features:
5.1.3
246
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Output of up to 23-bit address bus and control signals to be used with a non-muxed external bus
Bidirectional 16-bit external data bus with option to disable upper half
Visibility of internal bus activity
Single-chip modes
The external bus interface is not available in these modes.
Expanded modes
Address, data, and control signals are activated on the external bus in normal expanded mode and
special test mode.
Emulation modes
The external bus is activated to interface to an external tool for emulation of normal expanded mode
or normal single-chip mode applications.
Glossary or Terms
Features
Modes of Operation
single-chip modes
external resource
expanded modes
emulation modes
normal modes
special modes
access source
EMULMEM
bus clock
PRR
PRU
NS
SS
NX
ES
EX
ST
MC9S12XE-Family Reference Manual , Rev. 1.23
System Clock. Refer to CRG Block Guide.
Normal Expanded Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Special Test Mode
Normal Single-Chip Mode
Special Single-Chip Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Normal Single-Chip Mode
Normal Expanded Mode
Special Single-Chip Mode
Special Test Mode
Normal Single-Chip Mode
Special Single-Chip Mode
Normal Expanded Mode
Emulation Single-Chip Mode
Emulation Expanded Mode
Special Test Mode
Addresses outside MCU
Port Replacement Registers
Port Replacement Unit
External emulation memory
CPU or BDM or XGATE
Freescale Semiconductor

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