MC9S12XEQ384MAG Freescale Semiconductor, MC9S12XEQ384MAG Datasheet - Page 273

• Manufacturer Part Number: MC9S12XEQ384MAG
• Description: MCU 16BIT 384K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEQ384MAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 24 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Package: 144LQFP
• Family Name: HCS12X
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 1.8|2.8|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Please refer to the notes following the PRIOLVL[2:0] description below.
1. Please refer to the notes following the PRIOLVL[2:0] description below.
1. Please refer to the notes following the PRIOLVL[2:0] description below.
1. Please refer to the notes following the PRIOLVL[2:0] description below.
Freescale Semiconductor
Address: 0x0128
Address: 0x0129
Address: 0x012A
Address: 0x012B
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
W
W
W
R
R
R
R
RQST
RQST
RQST
RQST
0
0
0
0
7
7
7
7
Figure 6-6. Interrupt Request Configuration Data Register 0 (INT_CFDATA0)
Figure 6-7. Interrupt Request Configuration Data Register 1 (INT_CFDATA1)
Figure 6-8. Interrupt Request Configuration Data Register 2 (INT_CFDATA2)
Figure 6-9. Interrupt Request Configuration Data Register 3 (INT_CFDATA3)
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
0
0
0
0
6
6
6
6
MC9S12XE-Family Reference Manual Rev. 1.23
5
0
0
5
0
0
5
0
0
5
0
0
0
0
0
0
0
0
0
0
4
4
4
4
0
0
0
0
0
0
0
0
3
3
3
3
2
0
2
0
2
0
2
0
Chapter 6 Interrupt (S12XINTV2)
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
0
0
0
0
1
1
1
1
1
1
1
1
0
(1)
0
(1)
0
(1)
0
(1)
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