MC9S12XEQ384MAG Freescale Semiconductor, MC9S12XEQ384MAG Datasheet - Page 369

• Manufacturer Part Number: MC9S12XEQ384MAG
• Description: MCU 16BIT 384K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEQ384MAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 24 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Package: 144LQFP
• Family Name: HCS12X
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 1.8|2.8|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3.1.9
The eight software triggers of the XGATE module can be set and cleared through the XGATE Software
Trigger Register
write access to the lower byte, the software trigger bits. These bits can be set or cleared if a "1" is written
to the associated mask in the same bus cycle. Refer to
further information.
Module Base +0x00018
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
R
15
0
0
XGATE Software Trigger Register (XGSWT)
14
0
0
Suggested Mnemonics for accessing the interrupt flag vector on a word
basis are:
(Figure
XGIF_7F_70 (XGIF[127:112]),
XGIF_6F_60 (XGIF[111:96]),
XGIF_5F_50 (XGIF[95:80]),
XGIF_4F_40 (XGIF[79:64]),
XGIF_3F_30 (XGIF[63:48]),
XGIF_2F_20 (XGIF[47:32]),
XGIF_1F_10 (XGIF[31:16]),
XGIF_0F_00 (XGIF[15:0])
13
0
0
Figure 10-11. XGATE Software Trigger Register (XGSWT)
XGSWTM[7:0]
10-11). The upper byte of this register, the software trigger mask, controls the
12
0
0
MC9S12XE-Family Reference Manual Rev. 1.23
11
0
0
10
0
0
0
0
9
NOTE
0
0
8
Section 10.5.2, “Outgoing Interrupt
0
7
6
0
0
5
XGSWT[7:0]
0
4
Chapter 10 XGATE (S12XGATEV3)
0
3
0
2
Requests”
1
0
for
0
0
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