MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 73

IC MCU 8MHZ 32K FLASH 64-QFP

MC908MR32CFUE

Manufacturer Part Number
MC908MR32CFUE
Description
IC MCU 8MHZ 32K FLASH 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908MR32CFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
44
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08MR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8.2 MHz
Number Of Programmable I/os
44
Number Of Timers
6
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 5
Configuration Register (CONFIG)
5.1 Introduction
This section describes the configuration register (CONFIG). This register contains bits that configure
these options:
5.2 Functional Description
The configuration register (CONFIG) is used in the initialization of various options. The configuration
register can be written once after each reset. All of the configuration register bits are cleared during reset.
Since the various options affect the operation of the microcontroller unit (MCU), it is recommended that
this register be written immediately after reset. The configuration register is located at $001F and may be
read at anytime.
Freescale Semiconductor
Resets caused by the low-voltage inhibit (LVI) module
Power to the LVI module
Computer operating properly (COP) module
Top-side pulse-width modulator (PWM) polarity
Bottom-side PWM polarity
Edge-aligned versus center-aligned PWMs
Six independent PWMs versus three complementary PWM pairs
On a FLASH device, the options are one-time writeable by the user after
each reset. The registers are not in the FLASH memory but are special
registers containing one-time writeable latches after each reset. Upon a
reset, the configuration register defaults to predetermined settings as
shown in
If the LVI module and the LVI reset signal are enabled, a reset occurs when
V
nine consecutive central processor unit (CPU) cycles. Once an LVI reset
occurs, the MCU remains in reset until V
DD
falls to a voltage, V
Figure
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
5-1.
LVRx
, and remains at or below that level for at least
NOTE
DD
rises to a voltage, V
LVRX
.
73

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