R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 341

• Manufacturer Part Number: R4F24268NVFQV
• Description: MCU 256K FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24268NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
(4)
The EXDMAC sends the bus arbiter a request for the bus when an activation request is generated.
As the EXDMAC is used exclusively for transfers to and from the external bus, if the bus is
transferred to the EXDMAC, internal accesses by other internal bus masters are still executed in
parallel.
In normal transfer mode or cycle steal transfer mode, the EXDMAC releases the bus after a single
transfer.
In block transfer mode, it releases the bus after transfer of one block, and in burst transfer mode,
after completion of the transfer. By setting the BGUP bit to 1 in EDMDR, it is possible to specify
temporary release of the bus in the event of an external access request from an internal bus master.
For details see section 8, EXDMA Controller (EXDMAC).
Note: The EXDMAC is not supported by the H8S/2424 Group.
(5)
When the BREQ pin goes low and an external bus release request is issued while the BRLE bit is
set to 1 in BCR, a bus request is sent to the bus arbiter.
External bus release can be performed on completion of an external bus cycle.
6.14
In a reset, this LSI, including the bus controller, enters the reset state immediately, and any
executing bus cycle is aborted.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
EXDMAC
External Bus Release
Bus Controller Operation in Reset
Section 6 Bus Controller (BSC)
Page 311 of 1372