MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 68

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 1 Device Overview MC9S12XD-Family
1.3
The clock and reset generator module (CRG) provides the internal clock signals for the core and all
peripheral modules.
See 79Chapterf or details on clock generation.
The MCU’s system clock can be supplied in several ways enabling a range of system operating frequencies
to be supported:
The clock generated by the PLL or oscillator provides the main system clock frequencies core clock and
bus clock. As shown in
memories, and the peripherals.
The program Flash memory and the EEPROM are supplied by the bus clock and the oscillator clock.The
oscillator clock is used as a time base to derive the program and erase times for the NVM’s. See the Flash
and EEPROM section for more details on the operation of the NVM’s.
68
EXTAL
XTAL
The on-chip phase locked loop (PLL)
the PLL self clocking
the oscillator
SCI Modules
System Clock Description
Bus Clock
RAM
CRG
Figure 1-12
Figure
Figure 1-14. MC9S12XD Family Clock Connections
SPI Modules
1-12, this system clocks are used throughout the MCU to drive the core, the
S12X
shows the clock connections from the CRG to all modules.
MC9S12XDP512 Data Sheet, Rev. 2.21
Core Clock
CAN Modules
XGATE
Oscillator Clock
FLASH
IIC Modules
EEPROM
Freescale Semiconductor
ATD Modules
ECT
PIM
PIT

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