MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 17

• Manufacturer Part Number: MC68331CEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 80Byte
• # I/os (max): 18
• Number Of Timers - General Purpose: 1
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

SIMCR —SIM Configuration Register
3.2.1 System Configuration
EXOFF —External Clock Off
FRZSW —Freeze Software Enable
FRZBM —Freeze Bus Monitor Enable
MC68331TS/D
RESET:
EXOFF
15
CLOCK
0
The SIM controls MCU configuration during normal operation and during internal testing.
The SIM configuration register controls system configuration. It can be read or written at any time, ex-
cept for the module mapping (MM) bit, which can be written only once.
0 = The CLKOUT pin is driven from an internal clock source.
1 = The CLKOUT pin is placed in a high-impedance state.
0 = When FREEZE is asserted, the software watchdog and periodic interrupt timer counters con-
1 = When FREEZE is asserted, the software watchdog and periodic interrupt timer counters are dis-
0 = When FREEZE is asserted, the bus monitor continues to operate.
1 = When FREEZE is asserted, the bus monitor is disabled.
FRZSW FRZBM
14
0
tinue to run.
abled, preventing interrupts during software debug.
13
0
PRESCALER
12
0
0
2
Figure 6 System Configuration and Protection Block
9
Freescale Semiconductor, Inc.
DATA11
SLVEN
11
For More Information On This Product,
SPURIOUS INTERRUPT MONITOR
10
0
0
Go to: www.freescale.com
RESET STATUS
HALT MONITOR
BUS MONITOR
9
0
SHEN
SOFTWARE WATCHDOG TIMER
PERIODIC INTERRUPT TIMER
8
0
SUPV
7
1
MM
6
1
5
0
0
4
0
0
RESET REQUEST
BERR
RESET REQUEST
IRQ[7:1]
3
1
1
300 SYS PROTECT BLOCK
IARB
$YFFA00
1
0
1
17