MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 77

• Manufacturer Part Number: MC68331CEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 80Byte
• # I/os (max): 18
• Number Of Timers - General Purpose: 1
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
PCLKS — PCLK Pin State (Read Only)
I4/O5 — Input Capture 4/Output Compare 5
PACLK[1:0] — Pulse Accumulator Clock Select (Gated Mode)
PACNT — Pulse Accumulator Counter
TIC[1:3] — Input Capture Registers 1–3
TOC[1:4] — Output Compare Registers 1–4
TI4/O5 — Input Capture 4/Output Compare 5 Register
TCTL1/TCTL2 — Timer Control Registers 1–2
MC68331TS/D
RESET:
OM5
15
0
The effects of PEDGE and PAMOD are shown in the following table.
8-bit read/write counter used for external event counting or gated time accumulation.
The input capture registers are 16-bit read-only registers which are used to latch the value of TCNT
when a specified transition is detected on the corresponding input capture pin. They are reset to $FFFF.
The output compare registers are 16-bit read/write registers which can be used as output waveform
controls or as elapsed time indicators. For output compare functions, they are written to a desired match
value and compared against TCNT to control specified pin actions. They are reset to $FFFF.
This register serves either as input capture register 4 or output compare register 5, depending on the
state of I4/O5 in PACTL.
TCTL1 determines output compare mode and output logic level. TCTL2 determines the type of input
capture to be performed.
0 = External event counting
1 = Gated time accumulation
0 = Output compare 5 enabled
1 = Input capture 4 enabled
OL5
14
0
OM4
13
0
PACLK[1:0]
OL4
12
0
PAMOD
00
01
10
11
Freescale Semiconductor, Inc.
0
0
1
1
OM3
11
For More Information On This Product,
0
OL3
10
0
PEDGE
Go to: www.freescale.com
0
1
0
1
OM2
9
0
Same Clock Used to Increment TCNT
Pulse Accumulator Clock Selected
System Clock Divided by 512
PAI falling edge increments counter
OL2
PAI rising edge increments counter
8
0
External Clock, PCLK
TOF Flag from TCNT
Zero on PAI inhibits counting
One on PAI inhibits counting
7
0
EDGE4
Effect
6
0
$YFF914, $YFF916, $YFF918, $YFF91A
5
0
EDGE3
$YFF90E, $YFF910, $YFF912
4
0
3
0
EDGE2
2
0
$YFF91C
1
0
$YFF91E
EDGE1
0
0
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