M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 16

• Manufacturer Part Number: M30290FAHP#U5A
• Description: IC M16C/29 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/29r

Specifications of M30290FAHP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 27x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

18. CRC Calculation Circuit _____________________________________ 313
19. Programmable I/O Ports _____________________________________ 316
20. Flash Memory Version ______________________________________ 330
17.2 Operating Modes ........................................................................................................ 300
17.3 Configuration of the CAN Module System Clock ........................................................ 303
17.4 Acceptance Filtering Function and Masking Function ................................................ 305
17.5 Acceptance Filter Support Unit (ASU) ........................................................................ 306
17.6 BasicCAN Mode ......................................................................................................... 307
17.7 Return from Bus off Function ...................................................................................... 308
17.8 Time Stamp Counter and Time Stamp Function ......................................................... 308
17.9 Listen-Only Mode ....................................................................................................... 308
17.10 Reception and Transmission .................................................................................... 309
17.11 CAN Interrupts .......................................................................................................... 312
18.1 CRC Snoop ................................................................................................................ 313
19.1 Port Pi Direction Register (PDi Register, i = 0 to 3, 6 to 10) ....................................... 316
19.2 Port Pi Register (Pi Register, i = 0 to 3, 6 to 10) ......................................................... 316
19.3 Pull-up Control Register 0 to 2 (PUR0 to PUR2 Registers) ........................................ 316
19.4 Port Control Register (PCR Register) ......................................................................... 316
19.5 Pin Assignment Control Register (PACR) ................................................................... 317
19.6 Digital Debounce Function ......................................................................................... 317
20.1 Flash Memory Performance ....................................................................................... 330
20.2 Memory Map ............................................................................................................... 332
20.3 Functions To Prevent Flash Memory from Rewriting .................................................. 335
17.2.1 CAN Reset/Initialization Mode ............................................................................. 300
17.2.2 CAN Operating Mode ........................................................................................... 301
17.2.3 CAN Sleep Mode ................................................................................................. 301
17.2.4 CAN Interface Sleep Mode .................................................................................. 302
17.2.5 Bus Off State ........................................................................................................ 302
17.3.1 Bit Timing Configuration ....................................................................................... 303
17.3.2 Bit-rate .................................................................................................................. 304
17.10.1 Reception ........................................................................................................... 310
17.10.2 Transmission ...................................................................................................... 311
20.1.1 Boot Mode ........................................................................................................... 331
20.3.1 ROM Code Protect Function ................................................................................ 335
20.3.2 ID Code Check Function ...................................................................................... 335
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