M30290FAHP#U5A Renesas Electronics America, M30290FAHP#U5A Datasheet - Page 466

• Manufacturer Part Number: M30290FAHP#U5A
• Description: IC M16C/29 MCU FLASH 96K 80LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/29r

Specifications of M30290FAHP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 27x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K330290S000BE - KIT EVAL STARTER FOR M16C/29M30290T2-CPE - EMULATOR COMPACT M16C/26A/28/29M30290T2-CPE-HP - EMULATOR COMPACT FOR M16C/TINY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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1
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6
0
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1
9
1 .
B
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8. If the CPU reads the ADi register (i = 0 to 7) at the same time the conversion result is stored in the ADi
9. If A/D conversion is forcibly terminated while in progress by setting the ADST bit in the ADCON0
10. When setting the ADST bit in the ADCON register to 0 and terminating forcefully by a program in
0
2
register after completion of A/D conversion, an incorrect value may be stored in the ADi register. This
problem occurs when a divide-by-n clock derived from the main clock or a subclock is selected for CPU
clock.
register to 0 (A/D conversion halted), the conversion result of the A/D converter is undefined. The
contents of ADi registers irrelevant to A/D conversion may also become undefined. If while A/D conver-
sion is underway the ADST bit is cleared to 0 in a program, ignore the values of all ADi registers.
single sweep conversion mode, A/D delayed trigger mode 0 and A/D delayed trigger mode 1 during
A/D converting operation, the A/D interrupt request may be generated. If this causes a problem, set the
ADST bit to 0 after an interrupt is disabled.
9
1
M
• When operating in one-shot, single-sweep mode, simultaneous sample sweep mode, delayed
trigger mode 0 or delayed trigger mode 1
• When operating in repeat mode or repeat sweep mode 0 or 1
0
G
1
r a
Check to see that A/D conversion is completed before reading the target ADi register. (Check the
ADIC register’s IR bit to see if A/D conversion is completed.)
Use the main clock for CPU clock directly without dividing it.
o r
0 -
3 .
1
u
, 0
1
p
2
2
0
0
7
page 440
f o
4
5
8
22. Usage Notes