M30620FCAFP#U5 Renesas Electronics America, M30620FCAFP#U5 Datasheet - Page 383

• Manufacturer Part Number: M30620FCAFP#U5
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30620FCAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: M16C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 87
• Interface Type: SIM/UART
• On-chip Adc: 10-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 11
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Clock-Synchronous Serial I/O
2-64
Operation
2.4.3 Operation of the Serial I/O (transmission in clock-synchronous serial I/O
In transmitting data in clock-synchronous serial I/O mode, choose functions from those listed in Table
2.4.2. Operations of the circled items are described below. Figure 2.4.10 shows the operation timing, and
Figures 2.4.11 and 2.4.12 show the set-up procedures.
mode, transfer clock output from multiple pins function selected)
Table 2.4.2. Choosed functions
(1) Setting the transmit enable bit to “1” makes data transmissible status ready.
(2) When transmission data is written to the UART1 transmit buffer register, transmission data
(3) When transmission of 1-byte data is completed, the transmit register empty flag goes to “1”,
(4) Setting CLK/CLKS select bit 1 to “1” and setting CLK/CLKS select bit 0 to “1” causes the
Note 1: This can be selected only when UART1 is used in combination with the internal clock. When this function is
Note 2: UART2 only.
CTS function
CLK polarity
Transfer clock
source
Transfer clock
held in the UART1 transmit buffer register is transmitted to the UART1 transmit register in
synchronization with the first falling edge of the transfer clock. At this time, the first bit of the
transmission data is transmitted from the TxD1 pin. Then the data is transmitted bit by bit
from the lower order in synchronization with the falling edges of the transfer clock.
which indicates that the transmission is completed. The transfer clock stops at “H” level. At
this time, the UART1 transmit interrupt request bit goes to “1”.
CLKS1 pin to go to the transfer clock output pin. Change the transfer clock output pin when
transmission is halted.
selected, UART1 CTS/RTS function can not be utilized. Set the UART1 CTS/RTS disable bit to “1”.
Item
O
O
O
O
_______ _______
External clock (CLKi pin)
Output transmission data at
the falling edge of the
transfer clock
Output transmission data at
the rising edge of the
transfer clock
LSB first
Internal clock (f
CTS function disabled
MSB first
CTS function enabled
Set-up
1
/ f
8
/ f
32
)
Output transfer clock
to multiple pins
(Note 1)
Transmission
interrupt factor
Data logic select
function
(Note 2)
T
polarity reverse bit
(Note 2)
X
D, R
X
Item
D I/O
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
_______ _______
O
O
O
O
Transmission buffer empty
Transmission complete
Reverse
Reverse
Not selected
Selected
No reverse
No reverse
M16C / 62A Group
Mitsubishi microcomputers
Set-up