UPD70F3735GK-GAK-AX Renesas Electronics America, UPD70F3735GK-GAK-AX Datasheet - Page 217

• Manufacturer Part Number: UPD70F3735GK-GAK-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3735GK-GAK-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
(1) External event count mode operation flow
Remark
<1> Count operation start flow
<2> Count operation stop flow
INTTPnCC0 signal
TPnCCR0 register
(TPnCKS0 to TPnCKS2 bits)
n = 0 to 2, 5
Figure 7-12. Flow of Software Processing in External Event Count Mode
Register initial setting
16-bit counter
TPnCCR0 register,
TPnCTL1 register,
TPnIOC0 register,
TPnIOC2 register,
TPnCTL0 register
TPnCE bit = 1
TPnCE bit = 0
TPnCE bit
START
FFFFH
STOP
0000H
<1>
D
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
Initial setting of these registers
is performed before the
TPnCE bit is set to 1.
The TPnCKS0 to TPnCKS2 bits can
be set when counting starts
(TPnCE bit = 1).
The counter is initialized and counting
is stopped by clearing the TPnCE bit to 0.
0
D
0
D
0
D
0
<2>
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