UPD78F0138HGK-9ET-A Renesas Electronics America, UPD78F0138HGK-9ET-A Datasheet - Page 173

• Manufacturer Part Number: UPD78F0138HGK-9ET-A
• Description: MCU 8BIT 60K FLASH 64TQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx1+r

Specifications of UPD78F0138HGK-9ET-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: 3-Wire SIO, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 42
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

6.4.5 Square-wave output operation
bit timer capture/compare register 00n (CR00n).
bit 0 (TOE0n) and bit 1 (TOC0n1) of 16-bit timer output control register 0n (TOC0n) to 1. This enables a square wave
with any selected frequency to be output.
The basic operation setting procedure is as follows.
<1> Set the count clock by using the PRM0n register.
<2> Set the CRC0n register (see Figure 6-34 for the set value).
<3> Set the TOC0n register (see Figure 6-34 for the set value).
<4> Set any value to the CR00n register (0000H cannot be set).
<5> Set the TMC0n register to start the operation (see Figure 6-34 for the set value).
Caution Do not rewrite CR00n during TM0n operation.
Remarks 1. For the setting of the TO0n pin, see 6.3 (5) Port mode register 0 (PM0).
A square wave with any selected frequency can be output at intervals determined by the count value preset to 16-
The TO0n pin output status is reversed at intervals determined by the count value preset to CR00n + 1 by setting
TMC0n
CRC0n
Setting
7
0
7
0
2. For how to enable the INTTM00n interrupt, see CHAPTER 17 INTERRUPT FUNCTIONS.
6
0
6
0
Figure 6-34. Control Register Settings in Square-Wave Output Mode (1/2)
5
0
5
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
4
0
4
0
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
TMC0n3
1
3
0
TMC0n2
CRC0n2
0/1
1
User’s Manual U16899EJ3V0UD
TMC0n1
CRC0n1
0/1
0
CRC0n0
OVF0n
0
0
Clears and starts on match between TM0n and CR00n.
CR00n used as compare register
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