UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 686

• Manufacturer Part Number: UPD70F3736GK-GAK-AX
• Description: MCU 32BIT V850ES/JX3-L 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3736GK-GAK-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 66
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 256KB (256K x 8)
• Data Converters: A/D 8x10b, D/A 1x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

686
Item
LVI
Main clock oscillator
Subclock oscillator
Internal oscillator
PLL
CPU
DMA
Interrupt controller
Timer P (TMP0 to TMP2, TMP5)
Timer Q (TMQ0)
Timer M (TMM0)
Watch timer
Watchdog timer 2
Serial interface
A/D converter
D/A converter
Real-time output function (RTO)
Key interrupt function (KR)
CRC operation circuit
External bus interface
Port function
Internal data
Notes 1. If the low-voltage STOP mode is set while the A/D converter is operating, the A/D converter is
2. Even if the low-voltage STOP mode is set while the A/D converter is operating, the power consumption
3. If the low-voltage STOP mode is set while the D/A converter is operating, the D/A converter is
4. Even if the low-voltage STOP mode is set while the D/A converter is operating, the power consumption
automatically stopped and starts operating again after the low-voltage STOP mode is released.
However, in that case, the A/D conversion results after the low-voltage STOP mode is released are
invalid. All the A/D conversion results before the low-voltage STOP mode is set are invalid.
is reduced equivalently to when the A/D converter is stopped before the low-voltage STOP mode is set.
automatically stopped. After the low-voltage STOP mode is released, D/A conversion resumes, the
setting time elapses, and the status returns to the output level before the low-voltage STOP mode was
set.
is reduced equivalently to when the D/A converter is stopped before the low-voltage STOP mode is set.
Setting of Low-Voltage
CSIB0 to CSIB2
I
UARTA0 to UARTA2
2
C00, I
2
C01
STOP Mode
Table 21-9. Operating Status in Low-Voltage STOP Mode
Operable
Stops oscillation
Oscillation enabled
Stops operation
Stops operation
Stops operation
Stops operation (but standby mode release is possible)
Stops operation
Stops operation
Operable when f
count clock
Stops operation
Operable when f
count clock
Stops operation
(When the SCKBn input clock is selected as the count clock, be sure to stop the
SCKBn input clock (n = 0 to 2).)
Stops operation
Stops operation
(When the ASCKA0 input clock to UARTA0 is selected, be sure to stop the ASCKA0
input clock.)
Stops operation (conversion result undefined)
Stops operation
Stops operation (output held)
Operable
Stops operation
See 2.2 Pin States.
Retains status before low-voltage STOP mode was set
The CPU registers, statuses, data, and all other internal data such as the contents of
the internal RAM are retained as they were before the low-voltage STOP mode was
set.
CHAPTER 21 STANDBY FUNCTION
Preliminary User’s Manual U18952EJ1V0UD
When Subclock Is Not Used
Notes 3, 4
R
R
/8 is selected as the
/8 is selected as the
−
(high impedance is output)
Operating Status
Oscillates
Operable when f
the count clock
Operable when f
count clock
Operable when f
the count clock
Notes 1, 2
When Subclock Is Used
R
XT
R
/8 or f
/8 or f
is selected as the
XT
XT
is selected as
is selected as