SAK-TC1197-512F180E AC Infineon Technologies, SAK-TC1197-512F180E AC Datasheet - Page 20

• Manufacturer Part Number: SAK-TC1197-512F180E AC
• Description: IC MCU 32BIT 4MB FLASH BGA416-10
• Manufacturer: Infineon Technologies
• Series: TC11xxr

Specifications of SAK-TC1197-512F180E AC

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 180MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 219
• Program Memory Size: 4MB (4M x 8)
• Program Memory Type: FLASH
• Ram Size: 224K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 48x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 416-BGA
• Packages: PG-BGA-416
• Max Clock Frequency: 180.0 MHz
• Sram (incl. Cache): 224.0 KByte
• Can Nodes: 4
• A / D Input Lines (incl. Fadc): 48
• Program Memory: 4.0 MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.2.3
The TC1197 includes a high Performance CPU and a Peripheral Control Processor.
2.2.3.1
This chapter gives an overview about the TriCore 1 architecture.
TriCore (TC1.3.1) Architectural Highlights
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High-efficiency TriCore Instruction Set
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Integrated CPU related On-Chip Memories
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1) Software configurable. Available options are described in the CPU chapter.
Data Sheet
Unified RISC MCU/DSP
32-bit architecture with 4 Gbytes unified data, program, and input/output address
space
Fast automatic context-switching
Multiply-accumulate unit
Floating point unit
Saturating integer arithmetic
High-performance on-chip peripheral bus (FPI Bus)
Register based design with multiple variable register banks
Bit handling
Packed data operations
Zero overhead loop
Precise exceptions
Flexible power management
16/32-bit instructions for reduced code size
Data types include: Boolean, array of bits, character, signed and unsigned integer,
integer with saturation, signed fraction, double-word integers, and IEEE-754 single-
precision floating point
Data formats include: Bit, 8-bit byte, 16-bit half-word, 32-bit word, and 64-bit double-
word data formats
Powerful instruction set
Flexible and efficient addressing mode for high code density
Instruction memory: 40 KB total. After reset, configured into:
– 40 Kbyte Scratch-Pad RAM (SPRAM)
– 0 Kbyte Instruction Cache (ICACHE)
Data memory: 128 KB total. After reset, configured into:
– 128 Kbyte Local Data RAM (LDRAM)
High-performance 32-bit CPU
CPU Cores of the TC1197
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Introduction
V1.1, 2009-05
TC1197