MC68HC908QT2CDW Freescale Semiconductor, MC68HC908QT2CDW Datasheet - Page 27

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MC68HC908QT2CDW

Manufacturer Part Number
MC68HC908QT2CDW
Description
IC MCU 1.5K FLASH W/ADC 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908QT2CDW

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
5
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
2.4 Input/Output (I/O) Section
Addresses $0000–$003F, shown in
Additional I/O registers have these addresses:
$FE00 — Break status register, BSR
$FE01 — Reset status register, SRSR
$FE02 — Break auxiliary register, BRKAR
$FE03 — Break flag control register, BFCR
$FE04 — Interrupt status register 1, INT1
$FE05 — Interrupt status register 2, INT2
$FE06 — Interrupt status register 3, INT3
$FE07 — Reserved
$FE08 — FLASH control register, FLCR
$FE09 — Break address register high, BRKH
$FE0A — Break address register low, BRKL
$FE0B — Break status and control register, BRKSCR
$FE0C — LVI status register, LVISR
$FE0D — Reserved
$FFBE — FLASH block protect register, FLBPR
$FFC0 — Internal OSC trim value (factory programmed, VDD = 5.0 V)
$FFC1 — Internal OSC trim value (factory programmed, VDD = 3.0 V)
$FFFF — COP control register, COPCTL
Addr.
Register Name
Read:
Port A Data Register
$0000
(PTA)
Write:
See page 98.
Reset:
Read:
Port B Data Register
$0001
(PTB)
Write:
See page 100.
Reset:
$0002
Unimplemented
$0003
Unimplemented
Read:
Data Direction Register A
$0004
(DDRA)
Write:
See page 98.
Reset:
Read:
Data Direction Register B
$0005
(DDRB)
Write:
See page 101.
Reset:
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 5)
Freescale Semiconductor
Figure
2-2, contain most of the control, status, and data registers.
Bit 7
6
5
AWUL
R
PTA5
PTA4
Unaffected by reset
PTB7
PTB6
PTB5
PTB4
Unaffected by reset
R
R
DDRA5
DDRA4
0
0
0
DDRB7
DDRB6
DDRB5
DDRB4
0
0
0
= Unimplemented
MC68HC908QY/QT Family Data Sheet, Rev. 6
Input/Output (I/O) Section
4
3
2
1
PTA2
PTA3
PTA1
PTB3
PTB2
PTB1
0
DDRA3
DDRA1
0
0
0
0
DDRB3
DDRB2
DDRB1
0
0
0
0
R
= Reserved
U = Unaffected
Bit 0
PTA0
PTB0
DDRA0
0
DDRB0
0
27

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