HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 218

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 Data Transfer Controller (DTC)
8.2.8
DTVECR is an 8-bit readable/writable register that enables or disables DTC activation by
software, and sets a vector number for the software activation interrupt.
DTVECR is initialized to H'00 by a reset and in hardware standby mode.
Bit 7—DTC Software Activation Enable (SWDTE): Enables or disables DTC activation by
software.
Bit 7
SWDTE
0
1
Bits 6 to 0—DTC Software Activation Vectors 6 to 0 (DTVEC6 to DTVEC0): These bits
specify a vector number for DTC software activation.
The vector address is expressed as H'0400 + ((vector number) << 1). <<1 indicates a one-bit left-
shift. For example, when DTVEC6 to DTVEC0 = H'10, the vector address is H'0420.
Rev. 5.00 Jan 10, 2006 page 192 of 1042
REJ09B0275-0500
Bit
Initial value
R/W
Notes: 1. Only 1 can be written to the SWDTE bit.
DTC Vector Register (DTVECR)
2. Bits DTVEC6 to DTVEC0 can be written to when SWDTE = 0.
Description
DTC software activation is disabled
[Clearing conditions]
DTC software activation is enabled
[Holding conditions]
:
:
:
When the DISEL bit is 0 and the specified number of transfers have not ended
When 0 s written to the DISEL bit after a software-activated data transfer end
interrupt (SWDTEND) request has been sent to the CPU
When the DISEL bit is 1 and data transfer has ended
When the specified number of transfers have ended
During data transfer due to software activation
SWDTE
R/(W)*
7
0
1
DTVEC6
R/(W)*
6
0
2
DTVEC5
R/(W)*
5
0
2
DTVEC4
R/(W)*
4
0
2
DTVEC3
R/(W)*
3
0
2
DTVEC2
R/(W)*
2
0
2
DTVEC1
R/(W)*
1
0
2
(Initial value)
DTVEC0
R/(W)*
0
0
2