HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 264

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

9.8
9.8.1
The WDT can be used to cancel standby mode with an NMI or other interrupt. The procedure is
described below. (The WDT does not run when a reset is used for canceling, so keep the RESET
pin low until the clock stabilizes.)
1. Before transitioning to standby mode, always clear the TME bit in WTCSR to 0. When the
2. Set the type of count clock used in the CKS2–CKS0 bits in WTCSR and the initial values for
3. Switch to standby mode by executing a SLEEP instruction to stop the clock.
4. The WDT starts counting by detecting the edge change of the NMI signal or detecting
5. When the WDT count overflows, the CPG starts supplying the clock and the processor
6. Since the WDT continues counting from H'00, set the STBY bit in the STBCR register to 0 in
9.8.2
To change the frequency used by the PLL, use the WDT. When changing the frequency only by
switching the divider, do not use the WDT.
1. Before changing the frequency, always clear the TME bit in WTCSR to 0. When the TME bit
2. Set the type of count clock used in the CKS2–CKS0 bits of WTCSR and the initial values for
3. When the frequency control register (FRQCR) is written to, the clock stops and the processor
4. When the WDT count overflows, the CPG resumes supplying the clock and the processor
5. The counter stops at a value of H'00 or H'01. The stop value depends on the clock ratio.
Rev. 5.00, 09/03, page 218 of 760
TME bit is 1, an erroneous reset or interval timer interrupt may be generated when the count
overflows.
the counter in the WTCNT counter. These values should ensure that the time till count
overflow is longer than the clock oscillation settling time.
interrupts.
resumes operation. The WOVF flag in WTCSR is not set when this happens.
the interrupt handling routine and this will stop the WDT. When the STBY bit remains at 1,
the SH7709S again enters standby mode when the WDT has counted up to H'80. This standby
mode can be canceled by a power-on reset.
is 1, an erroneous reset or interval timer interrupt may be generated when the count overflows.
the counter in the WTCNT counter. These values should ensure that the time till count
overflow is longer than the clock oscillation settling time.
enters standby mode temporarily. The WDT starts counting.
resumes operation. The WOVF flag in WTCSR is not set when this happens.
Using the WDT
Canceling Standby
Changing the Frequency